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Of course, normally a fully-functional computer will calculate 1+1=2. However, the physics governing the behavior of a chip is quantum mechanical. So in principle there is a certain probability that something goes wrong and we get the result 1+1=x where x≠2. In my opinion this probability should get bigger the smaller the chips are becoming.

So the question is: How likely is this event? Can one give an order of magnitude?

P.S. I'm not talking about quantum computing, just "standard" computers nowadays everyone has on their desk.

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  • $\begingroup$ It's more likely that the result would be 1 or 0 than 3, methinks. $\endgroup$ – Dave Clarke Apr 21 '16 at 7:27
  • $\begingroup$ Ok, that's possible :-). However, the question is meant in a more fundamental way, regardless of which false result it will be in the end. I'll change it accordingly. $\endgroup$ – Ethunxxx Apr 21 '16 at 7:29
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    $\begingroup$ The probability is estimated to be less than 1 and greater than 0 :-) $\endgroup$ – Shreesh Apr 21 '16 at 7:46
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    $\begingroup$ I'm voting to close this question as off-topic because it's about computer engineering (it depends intimately on the physical electronics), not computer science. $\endgroup$ – David Richerby Apr 21 '16 at 8:47
  • $\begingroup$ Which community would be better suited for the question? $\endgroup$ – Ethunxxx Apr 21 '16 at 9:07
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The probability of read error is bigger than write error, so there is a chance for bitflip on either of $1$ which might occur anywhere.
I can offer description of JVM attack which is not exactly the answer, but shows how much effort is needed to induce bitflips, tells about softerrors and a very successful attack on JVM, given good heat ;).

The probability of error grows the most related with heat dissipation problems, and making chip smaller include it's higher efficiency (performance per watt).

Anyway there is bad assumption - making chip smaller gives more errors - if this were true over time CPUs would generate noticeable amount of errors today.

Please check also this error rate study. With calculating probability of error there is a problem - this is hardware dependent and the most of hardware actually has errors, but they get corrected at several levels, so they do not occur for user, and with invalid / broken piece machine crashes are to often to perform test.

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Have you heard about SEU : Single Event Upset and MEU : Multiple Event Upset...

Cosmic rays or radioactive decay can produce high energy particles able to flip bits. EDC bits in server DRAM, parity and EDC in CPU caches are there to protect against these problems.

Radioactive decay have been a problem sometimes within chip packaging : Unstable isotopes in the epoxy.

Cosmic rays and sun emitted particles is is a problem highly dependant on altitude : It seldom occurs on ground, sometimes in aircrafts, often in satellites.

This is not really about quantum mechanics randomness.

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