In the Art of Assembly ebook, I have read that 8088 processor require four clock cycle to access memory (in whatever clock speed & memory speed is). How is it calculated? Is it time for processor to prepare for calculate address and put data on the bus?
The 8088 is $16 bit$ microprocessor with $8 bit$ data bus, it requires $2$ cycles to access word. During the second read counter is automatticaly incremented. In 8088 $1$ cycle is needed to apply valid physical memory address (and read or write). The missing $1$ cycle is for preparation. The cycles are not calculated, simply read from specification steps performed.
- acquire valid address to address bus.
- RD (or WR) signal is issued, DEN is asserted (if WR then data is put onto the data bus). DEN connects data bus buffers to external data.
- allow memory to access data, if RD the data bus is sampled ot the end of cycle.
- bus signals are deactivated, data sampling is finished (RD). If WR data is transfered to memory.