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LOOP:LW    R1,0(R2)
     ADDI  R1,R1,#1
     SW    R1,0(R2)
     ADDI  R2,R2,#4
     SUB   R4,R3,R2
     BNEZ  R4, LOOP

If we want to move an instruction into a branch delay slot what will be that instruction and the schedule of the instructions?

In the solution they have brought SW R1,0(R2) into the branch delay slot like this:

LOOP:LW    R1,0(R2)
     ADDI  R2,R2,#4
     SUB   R4,R3,R2
     ADDI  R1,R1,#1
     BNEZ  R4, LOOP
     SW    R1,0(R2)

But according to me it will change the meaning of the program since R2 will be incremented by 4 before storing the word. Can anyone clear this?

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  • 1
    $\begingroup$ Welcome to Computer Science! The title you have chosen is not well suited to representing your question. Please take some time to improve it; we have collected some advice here. Thank you! $\endgroup$ – Raphael Oct 20 '16 at 9:20
  • $\begingroup$ How will it change the meaning? $\endgroup$ – Raphael Oct 20 '16 at 9:21
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    $\begingroup$ They are still teaching about branch delay slots? $\endgroup$ – gnasher729 Oct 21 '16 at 8:41
  • $\begingroup$ Can you give more details about the question? I think the compiler should have scheduled SW R1,-4(R2) in the delay slot and not SW R1,0(R2) because that would lead to wrong results in the program. $\endgroup$ – Sai Gautham Nov 19 '16 at 8:13
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There is an instruction already in the branch delay slot - it's just not displayed. So unless that instruction that isn't displayed is a NOP instruction, it will not be executed anymore if the branch is performed, so the meaning of the program has changed. Unless the question is "here is the code for a processor without branch delay slots, modify it for a processor with branch delay slots". In which case the obvious solution is to just move the last instruction before the conditional branch to the branch delay slot.

Independent of branch delay slot, you cannot just move the SW instruction which uses R2 past an instruction that modifies R2. In this case, you can move it if you modify it: R2 is increased by 4, so you can use the address -4(R2) instead of 0(R2).

In general, you initially don't care about branch delay slots and write code as if there were no branch delay slots, and add a NOP after each conditional branch, so you have correct code.

Then you move instructions into the branch delay slots, but carefully: You mustn't move an instruction if there is a branch to the conditional branch (because that instruction would be wrongly executed when branching to the conditional branch). You can't move certain instructions, like branches, returns, calls. And you can't move an instruction that was already moved. Say x = 0, branch if zero, not, branch if not zero, not. You can move the x = 0 into the first branch delay slot, but you mustn't move it into the second one.

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Yes, moving an instruction must not change the meaning of the program. However, as you correctly identified, the sw instruction uses R2 which is later being incremented by 4. Thus unless the instruction is changed to sw R1, -4(R2) (as suggested by Sai), the altered program may perform differently.

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