The Wikipedia article on complex instruction set computing says

Before the RISC philosophy became prominent, many computer architects tried to bridge the so-called semantic gap, i.e. to design instruction sets that directly supported high-level programming constructs such as procedure calls, loop control, and complex addressing modes, allowing data structure and array accesses to be combined into single instructions.

What do these "high-level" instructions that can handle loops look like? What does an instruction for a procedure call (strikes me as something of a nebulous term to use here) look like? Can a loop instruction be strung together with multiple instructions for multiple conditions like in a C loop? Does "procedure call" mean something like an instruction that can pass parameters to a function? "High-level" means nothing here without examples.

  • 1
    $\begingroup$ Google for an instruction set manual for the 68020 processor. $\endgroup$
    – gnasher729
    Jan 8, 2017 at 17:08
  • $\begingroup$ For x86, check out REP MOVSB, REP STOSB, etc: e.g.,stackoverflow.com/q/3818856/781723. $\endgroup$
    – D.W.
    Jan 8, 2017 at 17:36
  • $\begingroup$ Take a look at the x86 instruction set. Examples not already mentioned are ENTER and LEAVE. $\endgroup$ Jan 8, 2017 at 20:20

3 Answers 3


I know of two main aspects of complex instructions.

  • addressing modes. There are two sub-aspects here:

    • RISC tend to be load/store machines (that this the only instructions which access memory are those whose sole goal is that access), CISC tend to allow operands to be in memory and to be accessible with a variety of addressing modes. When each operand can have an independent addressing mode like on the VAX, that make the instruction complex.

    • the addressing modes of CISC tend to be more complex than those of RISC. When, like the PDP-10, the number of memory access needed to determine the true operand is unbounded, it makes the instruction complex.

  • the instructions themselves. That's what you are probably thinking about. Setup of complex stack frames with automatic saving of registers, which register to be saved being determined by a bitmap (see VAX) and other complex context switching state mechanism (see 80386 task gate or whatever their name is), polynomial evaluation (see VAX), insertion in a linked list (I don't remember where I've seen that and don't want to dig it out, VAX and PDP-10 are candidates), it is folklore (I don't know how true it is) that some machines in the IBM 360 family had instructions who where designed for the only usage of improving their Cobol library sorting function.

I think they all can be regrouped with one characteristic: complex instructions are those who need to do a relatively large (and I'd not argue strongly against defining large as being greeter than one), sometimes variable number of memory accesses. That characteristic brings true nightmare:

  • you need a relatively complex state machine to handle them, and to decide how to handle interrupts during the time they execute;
  • you need to be handle multiple page fault (in simple instruction you have two: one for the instruction, one for the data memory) which means that they may be interrupted and resumed for internal reasons several times, making the first issue more important.
  • $\begingroup$ I think the 68020 could have up to 9 page faults within a single instruction (from memory), with two addresses read from memory (two page faults each), one operand read and one result written to memory (two page faults each) and of course the instruction itself can cross a page boundary. $\endgroup$
    – gnasher729
    Jan 17, 2019 at 21:10

Mapping high level language concepts to instructions has gone out of fashion (because of a multitude of problems that it causes, which make code using these instructions slower nowadays).

What has become fashionable is instructions that can be used as building blocks for very specialised purposes, for example encryption/decryption and searching strings. For example Intel processors have an instruction doing the following: Given the first up to 16 characters of a string A, and the first up to 16 characters of a string B, find the smallest index i such that the string B might match the characters of string A at offset i.

Example: A = abcdxyzxaaaaaabc, B = abcde, result is 13 because the characters from offset 13 (abc and more characters that we don't know) might match abcde. B = vvvv, result is 16 because the characters of A from offset 16 (which we don't know at all) might match vvvv.

This instruction compares up to 136 pairs of characters and can make finding a substring very efficient.

  • $\begingroup$ Intel made an instruction just for that? $\endgroup$
    – Melab
    Jan 12, 2017 at 0:57
  • $\begingroup$ Except for the very beginning, computers are probably mostly used for text processing instead of actually "computing" stuff. How many different text files did your computer parse just to display this page (1 HTML file, 1 CSS file, 15 ECMAScript files, one of which is MathJax, which again parses the entire page)? How many floating point operations did it perform. Why shouldn't we have 1 instruction for parsing, we have an entire dedicated co-processor for floating point! $\endgroup$ Jan 13, 2017 at 13:45

CISC and RISC acronyms used to describe instruction sets were popularized many years after computers following these styles were designed. (A bit like "baroque" or "classical" styles which were named centuries later)

The way computers were designed and the constraints on the instruction sets were quite different when using discrete transistors, LSI, MSI or high integration chips.

One important aspect to understand for the traditional complex CISC instructions is that before the 80's, high performance computers were made of dozens or hundreds of ICs connected together. And the coordination between all these parts was made by microcode.

Microcode allows to create complex sequencing. And that sequencing was necessary because chips were very expensive : The same adder was used for the ALU, for calculating addresses, ... Instructions last many cycles.

So, once you have a lot of microcode in a programmed ROM for sequencing everything in the CPU, the additional cost for adding very complex instructions is low.

Additionally, having complex instructions allows to save some code RAM (and RAM was very expensive), and run faster (microcode accesses were faster than fetching code in RAM).

Contemporary processors try to avoid microcode or reserve it to rarely used instructions. Even for the CISC x86, modern CPUs transform most instructions into 1 or 2 elementary operations.

Some CISC examples : DEC VAX, IBM System 360, Data General Eclipse.


The microcode was sometimes extensible, reprogrammable, or partly in RAM.

Some instructions that were complex in the 70's, as floating point instructions, are now implemented by brute force using huge pipelined multipliers, adders, ... Another example are bit field insertion and extraction instructions which were sequenced and now implemented with barrel shifters.

Obsoleted instructions are those that used complex indirect addressing, function calls with automatic copying of parameters (present in x86 call gates), decimal, ASCII (or other character encoding) instructions, queue/linked list management. Some CPUs even had graphic instructions as bitblt (copy/fill a rectangle) or line drawing directly written in microcode.

Nowadays, the instruction sets of modern RISC CPUs as ARMs or IBM POWER is arguably more complex than ever, and every year new instructions are added, for multimedia, crypto... The difference with traditional CISCs is that they are not designed to be microcoded as a long sequence of calculations or memory accesses.


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