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I am on studying a consistency model: weak consistency. weak consistency This model was first defined by Dubois et al. (1986), by saying that it has three properties:

  1. Accesses to synchronization variables are sequentially consistent.
  2. No access to a synchronization variable is allowed to be performed until all previous writes have completed everywhere.
  3. No data access (read or write) is allowed to be performed until all previous accesses to synchronization variables have been performed.

And there is an example saying that the following sequence is weak consistent : A valid weak consistent sequence

Here, S represents accessing synchronization variables.

But how is this possible ? I don't understand how can the event R(x)2 happens before R(x)1 of processor P3 while W(x) 1 happens before W(x)2 on processor P1.

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    $\begingroup$ The layout is confusing by suggesting that the $S$ of $P_1$ temporally precedes the $R(x)1$ of $P_2$ and the $R(x)2$ of $P_3$ while it doesn't have any causal relationship with those events. Points 1–3 say nothing about unordered reads and writes. This means that different processes are allowed to see writes in inconsistent orders $\endgroup$
    – Kai
    Feb 13 '17 at 10:57
  • $\begingroup$ @Kai, Thanks a lot for your answer. But what kind of system allows reordering of events in such way ? Different processors read the write events in different ways, what's the meaning for this ? $\endgroup$
    – user66294
    Feb 14 '17 at 8:05
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Weak consistency rather appears in distributed systems where changes to variables have to be transmitted via the network.
Before a synchronization there is no guarantee to the visibility of write operations.
On P2 the W(x)1 could arrive before W(x)2 and on P2 W(x)2 could arrive before W(x)1.

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