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I am currently running my head around to understand if i am actually getting it correct or not?

A memory chip with 1 byte cell size has 12 address lines. How many data lines does the chip have? What is the memory size of the chip in Mbytes?

12 address lines means it has 2^12 cells in the memory, right?

Then what is MBytes size?

So confusing.

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  • $\begingroup$ How is this a computer science question? $\endgroup$
    – Raphael
    Mar 14 '17 at 21:05
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Ok - there's a lot of muddle here!

"Memory Byte" isn't a term at all. Nor is "mb" - that would mean "milli-bit", which isn't really a thing!

MB means Megabyte - which means either 1,000,000 bytes, or 1,048,576 bytes (1024x1024), depending on context. To avoid confusion, the term "Mebi" (implying binary form) is often used to mean the 1024 version, abbreviated MiB.

As a rule of thumb, memory sizes are usually quoted in mebibytes or similar - so a 16GB RAM is really 1,073,741,824 x 16. Disks are usually measured in decimal millions, because it makes them sound larger for marketing purposes.

Uppercase 'B' usually means bytes, and lowercase 'b' means bits. So "Mb" denotes megabits. As a rule, storage capacities are measured in bytes, and communication speeds are measured in bits/s, so you usually see 20Mbs meaning 20 megabits per second.

With respect to memory addressing: the number of address lines will relate to the number of memory "words" that can be individually addressed - and as you say, 12 address lines means 2^12 words can be addressed, which is 4096. How big is a "word"? That depends on the specific memory device.

For a small byte-addressable memory, the word unit is a byte, and each byte is accessed one at a time, so there will be 8 data lines. If it has 12 address lines, then it is a 4KB memory, and would be called a "4k x 8" memory - that's the specific answer to your question. But some devices are accessed 16 bits at a time (eg a 32k x 16), or even just 1 bit at a time.

In short, the number of address lines is independent of the memory's word size. But if you know the capacity of the device in bytes and you know the word size, you can calculate the size of the address bus.

Note that you can take two byte-addressable memory devices, wire their address buses together, and put them next to each other to create a 16-bit data bus: one device produces the bottom 8 bits and the other produces the top ones. That's how computer DIMMs work: lots of 4- or 8-bit wide memories ganged together to produce an effective 64-bit wide memory bus.

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To answer the questions you actually asked:

A memory chip with 1 byte cell size has 12 address lines. How many data lines does the chip have? What is the memory size of the chip in Mbytes?

Assuming the standard 8-bit byte (note: historically there HAVE been other choices!), then this chip has 8 data lines. Its total capacity is 4096 bytes, i.e (1/256)Mbyte. If you wanted to use such chips to build a useful main memory, you would need a whole lot of them (my advice: choose chips with a greater capacity).

12 address lines means it has 2^12 cells in the memory, right?

That is correct. But be aware: different chips could have different cell sizes. For example, one could have a chip with word-sized cells, where a word has 32 bits. With 12 address lines, such a chip would hava a capacity of 16384 bytes, but would only be able to access them in 4-byte chunks. If you wanted to address individual bytes on such a chip, you would have to 'set aside' the two low-order address bits in order to access the word containing that byte, then use those two address bits to pick the byte out of the word.

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  • $\begingroup$ So what would be the answer for MBytes size? $\endgroup$
    – Smit
    Mar 15 '17 at 7:02

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