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I'm a beginner and I don't understand what an Instruction Set Architecture is (I read the wikipedia page related to it).
Can anyone explain it to me in a simple manner please?

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  • $\begingroup$ It's generally advised to wait at least a day before accepting an answer, so multiple people have the opportunity to chime in. $\endgroup$ – gardenhead May 14 '17 at 3:49
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It's a description of how a certain processor is designed, e.g. which commands it understands, how many registers it has, how it handles interrupts, etc. Any program you write (in assembly) or compile (e.g. from C) for a specific ISA can run on any processor that uses that ISA.

To run a program compiled for one ISA on a different ISA, you need an emulator that translates commands and potentially simulates registers, etc.

For example, desktop PCs use the x86 ISA family, which is why you can run Windows, Ubuntu, etc on any x86 processor.

Smartphones and Raspberry Pis have processors with the ARM ISA, which is why you can't run regular x86 Windows on a RaspPi, instead requiring one specially built for ARM.

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  • $\begingroup$ I don't think branch prediction or pipelines stages are considered part of the ISA. They are implementation details, and have no effect on the programming interface $\endgroup$ – gardenhead May 14 '17 at 3:48
  • $\begingroup$ Oh right, I believe you're correct. $\endgroup$ – Dmiters May 14 '17 at 5:21
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Instruction Set Architecture is the broad concept of defining the nature of instructions in a computer. Classic differential architectures are CISC vs RISC. RISC is a reduced instruction set, and CISC, complex instruction set, is anything else.

A classic difference is an IBM S/360 being a CISC machine. Just look at the edit instructions and you will see what is meant by a complex instruction. An ARM architecture is considered RISC.

But there is more to instruction sets. For examples, are registers primarily used or is a stack primarily employed. How is I/O performed?

For example, a PDP-8, which has a 12 bit word, is considered a CISC processor because of how the instructions are constructed and grouped. So the size of the word is not the determining factor.

There has been an ongoing battle over whether large word instructions where operands are memory locations are more efficient than instructions which primarily address registers or stacks, with instructions that preload stacks.

The portability of code between processors is a function of the specific instruction set for the processors. It is possible to have very similar architectures, even though the instructions are different, and of course the code would not be portable.

On an aside, decades ago I earned my living by writing device drivers and peripheral diagnostics for various computers. About 40 of them. Oddly, the diagnostics were about the same number of bits in size regardless of the computer they ran on. I cannot say what the result of a similar informal analysis would be today, but it would be interesting.

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