If I have the sum-of-products expression
B~CD + ACD how would I convert this so it could be implemented using 3-input NAND gates through DeMorgan's Law? Would this not generate the expression:
~(~(B~CD) ^ ~(ACD))?
It would seem I could implement this and use a 3-input NAND gate with 3-C inputs to act as a NOT gate but this seems wrong.
If this isn't the right place for such a question, let me know and direct me elsewhere if possible, I'll remove it.