1
$\begingroup$

PIVT cache is indexed physically so address translation using TLB is needed to get into cache and we use virtual address as the tag for comparison .

I read that homonym is a problem which is caused when same VA maps to 2 different physical addresses and PIVT suffers from homonym. Source :- https://stackoverflow.com/questions/20787522/cache-addressing-methods-confusion

My question is, if we have 2 processes with same VA mapping to 2 different physical addresses (as both processes have their own page tables), then even though the tags are same, but the physical addresses are different so there should not be any problem. So, how can homonym occur in PIVT ?

$\endgroup$
  • 2
    $\begingroup$ The physical addresses are different but the bits of the physical address used for indexing can be the same. In common page-based translation and modulo 2 to the N indexing, the minimum page size offset bits will be the same and will be used for indexing. Since a cache is smaller than main memory (and is likely not to be direct-mapped), the number of index bits will be smaller than the number of physical address bits. $\endgroup$ – Paul A. Clayton Aug 12 '17 at 1:38
  • $\begingroup$ Sir, so you mean to say that 2 processes with different PA's can map to same cache line because size of cache is lesser than main memory and offset bits of 2 PA's may be same because number of offset bits is less than the number of bits required to index main memory. So cache line of which process will be stored in the cache as both process needs to store their data on the same cache line? $\endgroup$ – Zephyr Aug 12 '17 at 4:08

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Browse other questions tagged or ask your own question.