Can anyone explain how are conditionals implemented in the CPU?
Is special circuitry used?
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The semantics of any non-jump CPU instruction is to increment the program counter PC (a.k.a. instruction pointer) so that the subsequent instruction can be executed next.
Uncoditional jumps overwrite PC with a new, fixed value, written in the instruction. (Or, for relative jumps, add to PC said value)
Conditional jumps instead consider two possible values for PC: one pointing to the next instruction, another written inside the instruction (possibly as a PC increment, for relative jumps). Then, they test some given register, obtaining a bit. For instance, the register might be a flag, which is taken as is. Otherwise, the register might be tested for parity, sign, zero, etc. so to obtain a single bit. This bit controls which one of the two PC values is the one to write in the PC register. Usually, a hardware 2-to-1 multiplexer is responsible to choose between the two ones, exploiting the control bit.