I am currently learning about a CPU's status register and was confused about the difference between the carry flag and the overflow flag. Then I found article  which explains it very well, but I stumbled across one paragraph I don't really understand:

The rules for two's complement detect errors by examining the sign of the result. A negative and positive added together cannot be wrong, because the sum is between the addends. Since both of the addends fit within the allowable range of numbers, and their sum is between them, it must fit as well. Mixed-sign addition never turns on the overflow flag.

Let's look at 1111 and 0111. Both are valid 4-bit two's component values with a different sign. If I add them, I the carry-flag is turned on because the result of this addition is a 5-bit value.

The author says that errors in twos complement calculations can be found just by looking at the overflow bit. The overflow bit in this example would not get turned on, but in my opinion, this is an error. Why does the author claim this then? Why does the author tell the reader multiple times to ignore the carry bit when doing twos complement calculations?

If you perform the addition, you get 1111+0111 = 0110 (ignoring the carry bit). In decimal, this reads $-1 + 7 = 6$, which is indeed correct. There is no error.

You can check that when adding a positive number and a negative number, if the result is non-negative then there will always be carry, which can be safely ignored.

• So it's always safe, even when not thinking about status registers and stuff, to just discard any "final" carry you might be getting when adding two numbers in twos complement? Or is there any exception in which case this might not be true? – Maxbit Jan 4 '18 at 21:06
• You could still overflow when adding two numbers having the same sign. – Yuval Filmus Jan 4 '18 at 21:07

Your confusion is treating overflow and carry as the same thing. In reality $$\text{carry} \ne \text{overflow}$$

The overflow flag is turned on when there is an incorrect "sign" flip, i.e., when the addition of two positive numbers yields a negative number (one whose MSB is on; ignoring the carry-bit which is not part of the register) or when the addition of two negative numbers yield a positive one. This has nothing to do with the carry bit which is the bit beyond the MSB of the register.

It is not difficult to think of situations in which the carry bit is 1 while overflow is 0, or vice versa.

Once you understand this difference, re-read the reference and it should make better sense.