# What is the instruction format for an accumulator machine?

I need to learn about accumulator machines, but there is next to nothing written about them. Computer architecture channels seem to be flooded with general-purpose register ISAs (like MIPS, x86, etc).

I know that accumulator machines only have one register (called the Accumulator Register) that is implicit and not specified in any of the operations. In general, an instruction for an accumulator architecture is supposed to look something like: add memaddress.

However, I need to get more specfic. I need to know exactly how many bits are in the various instruction fields (i.e. opcode) for an instruction of an accumulator machine.

I have the following accumulator machine:

• $2^{24}$ words of memory (words are 32-bits wide)
• Fixed format instruction (but how many bits??)
• A 32-bit accumulator register
• An index register X
• Index addressing mode: address field + X when indexing is indicated in the instruction
• Capable of performing a total of 128 operations

The last bullet tells me that the opcode of an instruction would be 7 bits since $2^{7}=128$.

What would the instruction format be for a load/store instruction vs. an arithmetic instruction like add? It would help greatly if I knew how many bits the fixed format instruction should be.

Fixed format instruction means that all instructions have the same size of $k$ bits. You ask to learn what $k$ is.

• As you say, the opcode takes 7 bits. So $k \ge 7$
• In order to support memory operations (such as add mem or load mem etc) we need to be able to give an address (=mem). If the dressing mode is direct, and given there are 24 bits address, we have that $k \ge 7+24$.
• But the description of your CPU suggests that there is other addressing modes. Specifically, there is another register, index register that allows accessing the memory of [X+mem] where X is the content of the indexing register and $mem$ is the 24 bits of address we already counted for. Now, do we need to state X in the instruction itself? - No. we just need to be able to mention the addressing mode is different = a different opcode.
Your description doesn't give any information or constraints on this issue and there are many different ways to implement the same action. In particular, one can think of "load-byte" instruction which will update the (LSByte of the) accumulator with some fixed value. The current $k$ is enough for such instruction as long as the immediate value is at most 24bits. If you wish to have a way to update the entire 32bits of the accumulator using a single instruction you will have to increase $k$ to support this operation as well.
So unless there are other demands or clarifications to the description you gave, we get that $k \ge 31$.
• Which would suggest that k=32 because words are 32-bits wide May 22, 2018 at 14:34