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I'm confused about this exercise.

We have assembly code:

01: ADDI $1, $0, 1000 
02: LW   $2, 0($1) 
03: BEQ  $0, $0, LABEL  
04: MULT $3, $2  
05: ADDI $2, $2, 1000 
LABEL: 
06: MFLO $4  
07: ADDI $2, $1, 5 
08: SW   $2, 0($1) 
09: NOP

with:
- 6-stages Pipeline
- Branch Delay Slot
- No Bypassing

Is this correct?
enter image description here

Does the Instruction in Branch Delay Slot effect on/by the others Instructions. For example here:
02: LW \$2, 0(\$1) and 04: MULT \$3, \$2
04: MULT \$3, \$2 and 06: MFLO \$4

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  • $\begingroup$ Welcome to Computer Science! The title you have chosen is not well suited to representing your question. Please take some time to improve it; we have collected some advice here. Thank you! $\endgroup$ – Raphael♦ Feb 23 '18 at 11:36
  • $\begingroup$ This question appears to be unsuited for this site because questions of the form: "This is the exercise problem, this is my solution. Please grade!" are not interesting for anyone but you. Please see this related meta discussion, and these hints on asking questions about exercise problems. If you want to ask a specific question about a specific part of your attempt, please edit the question accordingly and it may be reopened. Otherwise, you might want to visit Computer Science Chat and get some feedback there. $\endgroup$ – Raphael♦ Feb 23 '18 at 11:37

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