Since a processing core with hyperthreading enabled is presented as two or more cores to the operating system, it can run completely different processes with different, isolated virtual memory spaces. There must be a mechanism that guarantees process address space isolation. How is it done in Intel hyperthreaded CPUs with regards to L1 cache? I can think of three possibilities:
1) virtual-physical address mapping is done before L1 (could add delay to L1);
2) each virtual core has its own L1 cache (costs space on the die);
3) only different threads of the same process are allowed to be hyperthreaded (must be implemented in the OS kernel)
Or is it something completely different?