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So in the book that I'm reading it says at a time only the data of one register can be on the data bus and only one register can load the data. the first part i get but what about the second part?

why can't we just turn on the load parameter for both of the registers at the same time?

I'm studying for computer architecture and this is the bus that I'm talking about:

Computer

so can we transfer the data from one register to multiple registers with 1 clock?

like transfer the content of AC to PC and DR with one clock?(turn on the load parameters for both of DR and PC at the same time? why can't we do that?)

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If we somehow turned on multiple load signals at the same time, in theory it should work to transfer the same value to multiple registers in the same cycle.

(Depending on the hardware design technology, there may be some power considerations, such as amplification of the data bus lines as they go into the various registers, since more gates are consuming the data bus lines concurrently; it is possible that such is required anyway, though.)

However, the diagram you're showing doesn't reveal the answer. Here's the issue: it doesn't show how the load signal is generated and delivered to the various registers.  So, we can't really tell.

If the load signal is driven by an ordinary MUX (under control of say, instruction decode, e.g. some field of the IR), then by design, it would only ever turn one line on at a time, meaning the answer is no.

But an alternate implementation could turn on multiple registers' load signal simultaneously, so in that case, then yes.

See also Register File, regarding "ports", in how processors with general purpose registers deal with the need to read and write them concurrently.

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  • $\begingroup$ Are modern day computers implemented with the ability of loading multiple registers with one clock as well? $\endgroup$ – John P Apr 3 '18 at 3:52
  • $\begingroup$ I don't know broadly speaking, but I would say that in high performance processors, they might very well support write to multiple registers at the same time (like, say, 3 or more reads and 2 or more writes concurrently), though by using register file ports these would be capable of writing different values to different registers, rather than only writing the same value to all registers (as in your question re: the data bus and load signals). $\endgroup$ – Erik Eidt Apr 3 '18 at 5:06

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