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I'm reading this book about assembly however I got stuck on one part, I can't seem to comprehend how memory address is 'applied' to the address pins

This is the image from the book

enter image description here

What I know here is the data pin applies voltage on the memory cell's input or output pin. And for the select pin the book explained that a binary code address is applied to the address pins, I imagined this part where there is only 1 address pin and 'something' is encoding the address to it, however looking at the diagram there are a lot of address pins for a few memory locations and they are connected to each other.

So my question here is how is the address "applied" to the address pins? Which part of the chip applies the address to the address pings because the book only said "You apply this address to the address pins"

btw, the book is titled "Assembly Language Step-by-Step - Programming with Linux 3rd edition" in case somebody who might've read it before can explain it to me.. Thanks in advance!

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  • $\begingroup$ I'm not sure your question makes a whole lot of sense. You're happy with the idea that a high or low voltage can be applied to a single pin, so why can't you just do that to 32 or 64 pins? I think you've misunderstood something more fundamental, but I'm not sure what it is. In particular, you seem to think that you could supply an address on just one. How do you propose to do that? By delivering each bit one after another? $\endgroup$ Commented May 7, 2018 at 12:19
  • $\begingroup$ The book I was reading it on didn't quite explain how memory addresses were supplied to the address pins (or maybe it was me who couldn't comprehend the authors way of explanation). Written in the book was "binary code address is applied to the address pins", reading this I was under assumption that each bit of the code would be supplied to the address pins "one after another" like you have said (which was wrong), and took a look at the diagram which made me more confused. Then again ratchet freak's answer made it much more clearer. Face palmed myself when I realized.. $\endgroup$
    – Dex
    Commented May 7, 2018 at 12:54

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Actually those 4 dots mean repeat. This means there are $2^{20} = 0x0FFFFF = 1,048,576$ memory cells, each with a line from the decoder. A few too many to draw them all.

Each of the lines from the decoder to a cell is an enable line. If not enabled the memory cell will do nothing (and have any output lines set to the data bus high impedance). If enabled the memory cell will read and write as you would expect.

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  • $\begingroup$ I forgot to ask in the post would you happen to know why there are a lot of address pins connected to Address Decoder Circuitry though? Like if the a memory address is applied to all the address pins which goes to the decoder, I'm thinking that wouldn't that be the same as applying the memory address to only 1 address pin which goes to the decoder? or is there a difference between the two? I think that I'm having wrong assumptions here and I need help with that :/ Thanks btw ^_^ $\endgroup$
    – Dex
    Commented May 7, 2018 at 10:33
  • $\begingroup$ Because to be able to address one out a million you need an identifier of 20 bits. Thus if your address is input in parallel you need a 20 bit address bus. Each cell is independent and will just have a read/write IO and an enable input. Keeping them independent makes the entire thing easier to design and build. $\endgroup$ Commented May 7, 2018 at 10:48
  • $\begingroup$ Oh my I just face palmed myself thanks a lot for the answer! Just to clarify, which part of the ram chip applies the address to the address pins? Is it the data pin or another part which isn't in the diagram? $\endgroup$
    – Dex
    Commented May 7, 2018 at 11:25
  • $\begingroup$ it is whatever is connected to the address pins that will set the proper pins high and low in a way that encodes the address they want to access. $\endgroup$ Commented May 7, 2018 at 11:30
  • $\begingroup$ Yeah I reread the parts I couldn't understand because I wasn't able to comprehend the address pins parts and saw a diagram where the address pins are connected to the CPU. Thanks a lot!!! I kind of understand what I am reading now better than before :3 $\endgroup$
    – Dex
    Commented May 7, 2018 at 12:06

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