1
$\begingroup$

In a typical read operation from a dram chip, all the banks are equipped with sense amplifiers which select one bit from each bank using column multiplexer. But how does write operation takes place? How does only one column in a bank is written in a particular row?

$\endgroup$
  • $\begingroup$ This interesting hardware question seems more appropriate for the electronics site. $\endgroup$ – Yuval Filmus Jun 21 '18 at 19:18
  • $\begingroup$ @YuvalFilmus I agree. This is a bit too low-level for Computer Science. Over here, we don't dig deeper than the interface the hardware presents to the operating system. Anything where the answer needs to talk about electrical signals is likely to be off-topic, here. $\endgroup$ – David Richerby Jun 21 '18 at 19:58
1
$\begingroup$

When reading the row then bits are amplified and sent back on the line as part of the feedback circuit. The bits are also stored in a small chunk of SRAM where they are cached for reads and writes.

writes to the rows don't happen immediately, only when unloading the data from the cache.

When unloading the cache the feedback circuit normally used to refresh the data is overridden with the new values in the row. All bits of the row are written.

| cite | improve this answer | |
$\endgroup$

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.