When software boils down to assembly, it is just a sequence of instructions like this:

mov rax, 1
mov rdi, 1
mov rsi, message
mov rdx, 13
mov rax, 60
xor rdi, rdi

I am not sure exactly how the program evaluator works (the thing navigating about the assembly / machine code), but I think it just goes sequentially through the assembly code, jumping to different locations in the assembly / machine code when it encounters a jump/branch instruction.

Essentially, it is sequential computation. The information on the ordering of instructions is inherent in the fact that they are written next to each other in the code (they have an adjacent location).

I understand there could be parallel computation, but not too much interested in that for this question.

In cognitive architectures, instead of sequential computation, it is as if they make a bunch of decisions, and then perform the action. So instead of the next "instruction" being adjacent to the current instruction, the next instruction is computed dynamically. Not sure how to explain this any deeper.

Roughly, instead of the next instruction being found by looking ahead in some location space, the instruction is found by analyzing some information and selecting it based on some decision. Rule-based systems seem to be somewhat similar, but I haven't seen them described as models of computation.

Wondering if there is any research on this topic. Alternatives to the sequential computation method, such as this dynamically-computed-instruction method (like rule-based systems).

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    $\begingroup$ In principle, CPUs can process code in a decision-based order; you mention jumps yourself; other instructions default to a relative jump by +1. In principle, there is no problem to designing an instruction set (and CPU) where every instruction potentially jumps (farther). My guess: It would probably not be very useful because humans have a hard time thinking in such terms. That also applies to concurrent and parallel models: humans have a hard time understanding/programming them, so they don't really exist. $\endgroup$ – Raphael Jul 1 '18 at 9:21
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    $\begingroup$ @Raphael Some (much) older CPUs were set up so that every instruction included the address of the next instruction to execute so adjacency in memory had no relevance. $\endgroup$ – Derek Elkins Jul 1 '18 at 9:56
  • $\begingroup$ @Raphael interesting, not sure what you mean here: "so they don't really exist", maybe you could explain a little further since I'm coming from seeing papers on the process calculi, petri nets, and other parallel / concurrent models (though I haven't actually read much on parallel / concurrent models). $\endgroup$ – Lance Pollard Jul 1 '18 at 18:03

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