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I have read that the translation lookaside buffer (TLB) is implemented in hardware and stores the page numbers and the corresponding frame numbers for faster lookups. Now suppose there are two processes, A and B. Page 2 is mapped to a particular frame number. Now if we are searching for page 2 in the TLB, it can belong to either process A or Process B. So how will the TLB determine which process the page belongs to? Or it is flushed each time a new process is brought into running state? Also, what mechanism is used in TLB lookup?

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In the most basic setup, the TLB doesn't determine that. Instead, the TLB only maintains mappings for the pages that are accessible to the current process. If process A is currently running, the TLB only contains mappings for the pages that are accessible to process A; so if page 2 belongs to process B, it won't be in the TLB.

Also, you should be aware that the TLB is a cache. The definitive authoritative mappings are in the page table, and the page table contains mappings only for the process that is currently running. The TLB is a cache of mappings found in the page table. It gets filled in as you go.

When you change which process is running, you change the page table (since now you need a different set of mappings), and you clear the TLB (so you don't have any old mappings that are only relevant to the previous process). Clearing the TLB is also called flushing the TLB.

I suggest reading a good OS textbook. This information can be found in many places, so do a bit of research. Also https://en.wikipedia.org/wiki/Translation_lookaside_buffer may be helpful.


That describes the basic setup. The disadvantage of the basic setup is that clearing the TLB is slow, which adds a lot of overhead every time you switch processes. That slows things down. Many modern processors have optimizations that reduce this overhead.

For instance, modern Intel TLBs have a process context ID (PCID); each TLB entry is tagged with the PCID of the process that the page mapping is for, and the processor will only use that TLB entry if its PCID matches the ID of the currently running process. The processor fills the PCID when it creates the TLB entry from a register which the operating system must set to a unique value for each process. You can read about that more by searching for PCID.

Arm processors have a somewhat similar feature called domains. Each page table entry contains a domain field, which must be set by the operating system if it wants to use this feature. The processor saves this value in the TLB entry. On a context switch, the operating system updates a register containing the set of currently accessible domains. A TLB entry is valid only if the corresponding domain is accessible.

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