# How are CPU architecture and word size related?

I did lot of research on internet but couldn't get my answer. I want to know what is the difference between the word size and CPU architecture?

For eg.- I read that CPU of 32-bit architecture can address 2^32 memory locations. Now if we consider that one address points to a single byte, then it means we can have memory size of 2^32 Bytes. We can call it byte addressable memory. Now, I also read that word size is the size of register in a CPU, i.e., it is the minimum no. of bits on which a CPU works upon.

So, help me understand here what is the word size of this computer organization? Is it 32-bit or 1 Byte (as memory is byte addressable)?

What if one address could point 2 Bytes of data instead of 1 Byte? What would be word size then?

Consider the following link.

GATE CS Questions on computer organisation

Question no. 3 from this link is as follows-

A machine has a 32-bit architecture, with 1-word long instructions. It has 64 registers, each of which is 32 bits long. It needs to support 45 instructions, which have an immediate operand in addition to two register operands. Assuming that the immediate operand is an unsigned integer, the maximum value of the immediate operand is

Now, the very first line of the solution says-

As machine has 32-bit architecture, therefore, 1 word = 32 bits = instruction size

How can we say that since CPU is 32-bit, word size is also 32 bit. Doesn't 32-bit architecture just mean that the no. of addresses in the physical memory is 2^32? And also doesn't the word size mean the size of memory each of those 2^32 addresses would point to?

It's simple - 32 bit word size, or 32 bit architecture, mean exactly what the person using the expression means. No more, no less. You can't draw any conclusions from it.

For example, there's an Intel 32 bit architecture that can address 64 GB of physical RAM, and no Intel 64 bit architecture that can address anything near 2^64 bytes of physical or virtual memory, while 32 bit PowerPC supported 2^53 bytes of virtual memory.

64 bit POWER has 32 bit instructions. 32 bit Intel has instructions from 8 bit to over 100 bit.

32 bit ARM is what it is, and 64 bit ARM is what it is. Some with 32 and 64 bit x86, except they are different. And so on. Don't make any assumptions, they will all be somewhere between wrong and not quite right.

If you want to pass an exam, learn the answers that the exam expects (sad but true).

On the question about what is the meaning of 32 in 32-bit CPU architecture or computer architecture and what is the word size of this computer organization, please check the question and answers at "Is word size, the size of a memory location? the size of the data bus? or the cpu register size?".

Now let us take a look at the Que 3 of GATE CS Questions on computer organisation.

• It reads "A machine has a 32-bit architecture, with 1-word long instructions. It has 64 registers, each of which is 32 bits long". That given specification asks/demands readers to treat 1 word as 32 bits long on that machine. There is no incentive to be extremely exacting or pedantic here.
• The solution line "As machine has 32-bit architecture, therefore, 1 word = 32 bits = instruction size" could have better been "The machine has 32-bit architecture with 32 bits = instruction size" to avoid the debatable connotation that "since CPU is 32-bit, word size is also 32 bit".
• However, that solution line with that connotation is not a glaring error anyway. For most of the computers that we have or we had have before 32-bit CPU do imply 32-bit word size. The majority if not most of the people I believe will take 32-bit word size on 32-bit cpu or computer architecture.
• In fact, it looks like that both the problem and you are distracted by an insignificant issue that is not directly related to the problem proper. I mean, to sidestep the irrelevant word-size issue or to make the word-size issue irrelevant, the problem could just read, "A machine of 32-bit architecture has instruction size as 32 bits. It has 64 registers, each of which is 32 bits long". However, I might be off the right track here since I know nothing about the curriculum of GATE exam. This is just my 2-cent observation as an outsider.

It's simple: n-bit architecture has n bits word length. For example: A 32-bit CPU has word length 4 bytes = 32 bits. The pointer size is the same. Think combinatorically: How many combinations can you point to with n bits?