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Questions tagged [computer-architecture]

Questions about the organization and design of computer hardware.

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Finding bits per address in memory

I dont know if this is any important IRL, but I am trying to understand lines below. 4K words of main memory (this implies 12 bits per address). 4M X 16 means the memory is 4M long (4M = $2^2 \times ...
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-2 votes
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Moore law prediction

Is Moore's law is about hardware or is it also about the computation power of CPU? or whole system? I went through link here and it looks its more about CPU but can we apply it for whole system? Is it ...
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Computer Architecture MIPS assembler with predictors

This MIPS code is given: ...
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What can be the topic of my assignment for presentation about overall computing performance?

I have received the below question for presentation. It was random assignment, its not my field. What is this specifically in Computer Architecture? how CPU and GPU architecture, memory bandwidth/...
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How do I determine how many blocks have been replaced and what the hit ratio is of the following direct-mapped cache?

I have a direct-mapped cache with the following properties: Address size = 32 bits Cache block size = 8 words Entries = 32 So we can see the cache as a 32 by 8 table where the index selects the row ...
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2 answers
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Are all CPU computations done using registers?

From my understanding, a CPU register is a temporary storage or working location built into the CPU itself. The CPU includes some functional units such as the ALU (which is part of the chip, as far as ...
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0 votes
1 answer
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Does cache hit time include both time to read a cache and time to write a cache?

For example, if it takes 1 cycle to read the cache and 3 cycles to write the cache, is the hit time equal to 4 cycles? Also, does this vary based on whether the cache is an instruction cache or a data ...
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0 votes
4 answers
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Can computers only add?

So recently I've been involved in a discussion and I was told that literally the only thing computer can do is addition. Is that true? What about logic operations? Aren't they performerd by physical ...
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1 vote
1 answer
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How can this MIPS processor execute one instruction in one cycle?

I'm reading section 7.3 (SINGLE CYCLE PROCESSOR) of Digital Design and Computer Architecture, Second Edition by David Money Harris. At the end of the section the autor shows this MIPS processor and ...
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1 vote
1 answer
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What does it mean unambiguously that a number is value 0 up to numerical precision?

I was reading that a quantity $x$ is $0$ upt to numerical precision. What does this statement formally mean -- especially in the context of numerical methods or real computers. I looked up in google ...
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0 votes
1 answer
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Difficulty understanding how federation increases cache performance for databases?

I am studying system design for distributed systems and in this page (https://github.com/donnemartin/system-design-primer), one of the following advantages was mentioned for federation for databases ...
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2 votes
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Von Neumann mixed with Havard in modern CPU?

Modern CPUs (for a very wider range of "modern") use separate data- and instruction-caches. So at the core they (probably) have separate busses for data and instructions. Does that make the &...
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1 answer
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What is the difference between clock cycle and clock period?

I'm reading Computer Organization and Design Sixth edition by Patterson and they define clock speed as this: Almost all computers are constructed using a clock that determines when events take place ...
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Performance of CPU with two caches

I was very confused how to solve the problem when there are two levels of cache, My doubt is how does we quantify the performance when there are two caches. Consider a problem like this Cache L1 ...
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0 votes
1 answer
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preprocessing or real time for magnification of portions of video

Im new at CS and would like to gather preliminary information to approach an interactive art project. I want to construct a grid of videos - think about a matrix M = m x n where Mi,j is a video that ...
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1 vote
3 answers
312 views

How bits translated into text on the screen?

recently i started studying computer science and computer graphics, and one question really haunts me. Mby someone can explain this. How bit patterns become translated into (for example ) text. I know ...
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0 votes
2 answers
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In Programming data types size are depends upon what?

In Programming there is different data types (int , cahr , bool , float ) and they have different sizes (1,2,4,8 .. Bytes) , and the size of data type are depends upon hardware or architecture of ...
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1 vote
3 answers
175 views

Why is C still the fastest? Critique my take

A friend and I were surprised that C still has near-best performance among languages. I thought about why this is, and I wrote up a few paragraphs. I wonder if the friendly folks on CS stack could ...
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1 answer
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Assembly language addressing mode instructions

I am studying assembly language. I feel very difficult in understanding few instruction. ADD R1,R2,[R3] ADD R1, R2, R3 What is the difference between these two instructions. I think second instruction ...
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1 vote
2 answers
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How are instructions from software sent to digital circuit in cpu?

I am studying computer architecture in my university and there is something that's troubling me. I get the bigger picture of how instructions are executed in the fetch - execute cycle and the complete ...
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0 votes
0 answers
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If I open & connect with 1 protocol to every port (all 65535) can we still open another protocol socket?

I understand and have googled how TCP & UDP can work simultaneously BUT does this assume there are unused ports to dynamically allocate? So if all ports are used by TCP can UDP still connect & ...
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What is meant by capability-based addressing and capability-system model?

What is meant by capability-based addressing and capability-system model? For context, I'm trying to understand the paper on Capability Hardware Enhanced RISC Instructions (CHERI). I haven't been ...
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Computations in sequential implementation of Y86 instructions

I try to write down computation for Y86 instruction: ...
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1 vote
0 answers
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Why place of MA in MB then copy from MB to IR rather than going straight from MA to IR

During the fetch stage of the fetch-execute cycle, why are the contents of the cell whose address is in the MA (memory address register) placed in MB (memory buffer) then copied to IR (instruction ...
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1 answer
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Max RAM capacity on modern cpus

I am wondering why modern consumer cpu usually has 128GB memory limit when server cpu supports terabytes. 128GB is really not that much. Do they really can't handle more RAM? How wide is their address ...
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3 votes
2 answers
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Why do we not use continuous real quantities to represent continuous numbers

I've just been doing some pondering, and given the fact that computers already operate on fundamentally continuous physical quantities, and then we have to use transistors to turn those real ...
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Calculating memory bandwidth

There's something I'm confused about in calculating the bandwidth. It's defined as number of bytes transferred, and we know that each word is 2 bytes, why are we multiplying 4 words by 4?
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115 views

8-bit binary to bcd converter Verilog

We have been given task to write a 8-bit binary to bcd converter Verilog code, using structural code NOT behavioural, is it possible to guide us how can we create 8-bit binary to bcd converter using ...
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0 votes
1 answer
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Addition in One's Complement

It is my belief that addition in one's complement is done the same way as unsigned addition except that if there is a carry out in the most significant bit then that carry is added to the last ...
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Minimum bitrate of common bus (I/O system) with minimum delay

I have a 32-bit MIPS which is connected to the main memory and a I/O system which is related to memory-mapped I/O, while there is DMA controller. The I/O system has discrete I/O communication lines ...
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Calculate memory size given address and its value

Given the address 00011001111011101111101011011111 and it save a value 0x1FA0CBB7. Calculate the memory size in KB What i try: the address has 32 bits so the memory size is 2^32 = 4294967296 bytes ...
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11 votes
3 answers
4k views

Why is a 4 KB alignment requirement imposed on Intel Core i7 page tables for Linux

I'm reading CSAPP and couldn't wrap my head around this part: Summary of what the section says: Intel Core i7 support a 48-bit virtual address space and 52-bit physical address space. Core i7 uses a ...
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0 answers
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Superscalar design on SimpleScalar simulation

I've learnt theoretically Computer Architecture at uni.However I can't wrap my head around it in practice. I am using Simple Scalar tool to simulate a benchmark program with configurable computer ...
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3 votes
1 answer
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Is there a meta-analysis of this concept anywhere?

In a textbook on systems and networks, it states "Stated broadly, a program tends to access a relatively small region of memory irrespective of its actual memory footprint in any given interval ...
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1 vote
0 answers
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How the data is transferred from main memory to hard disk?

I understand that data is transferred from the main memory to the CPU and vise versa using the data bus. But, I am unable to understand, how the data is being transferred from the main memory to the ...
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1 answer
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Which part of the CPU is responsible for executing instructions

I was reading about the machine cycle. Everything was clear until I started with the execution of instructions. I know how an ALU and a CU work. I'm also aware of the process of fetching and decoding. ...
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0 votes
2 answers
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How does a CPU do function calls?

Besides basic instructions for a general-purpose computer (binary arithmetic, move instruction, and jump on condition), it seems you can't implement a universal turing machine (is that even the right ...
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Is there a role of Systems design & architecture in AI?

I want to know if there's a role of systems architecture in AI/ML implementations. I'm a Middleware architect and have a good understanding of systems design. Did a Udacity course in the past on Self ...
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Alu architecture of a Hack Computer

I'm currently studying the ALU architecture (of a Hack computer) and how it works. As part of my assignments, I have been asked the following question: If we want the ALU to compute the function y-1, ...
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-1 votes
2 answers
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Is it possible to build a computer whose "ALU" is a single NAND gate?

I am not asking about if it is possible to build a computer using only NAND gates, since that question has been asked infinite times. I wonder if it is possible to replace the “ALU” in the cpu of a ...
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2 votes
4 answers
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Can there be a computer without software (only hardware)?

Can there be a computer without software (only hardware) which can produce meaningful output? "Software" would be for example an operating system (whether in the level of "firmware&...
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0 votes
2 answers
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If a 32-bit computer system is being used, what are the size of the data/address/control bus width? [duplicate]

Are they exactly 32bits for a 32-bit system ?
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What are the width of data/control/address bus for a 32-bit CPU?

Are they exactly 32bits for a 32-bit CPU?
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1 vote
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How can DRAM memory speeds be improved?

What are some ways with which we can improve the speed of dynamic RAMs?
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0 answers
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What are the chances of fusing a quantum computer and a parallel computer and what potential dangers/ benefits does it bring?

From my EPQ research I came to know that quantum computers require certain conditions to function optimally such as: low temperature so that electrons do not get disturbed etc. I've also read a book ...
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0 votes
1 answer
59 views

Where does tag directory is stored

I am studying direct mapping in cache. I understood the concepts like dividing into blocks and lines , tag directory etc. When solving numerical problems of finding main memory size or tag directory ...
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-3 votes
1 answer
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8085 microprocessor connection of CPU data bus with RAM data bus

What would happen if the CPU data-bus bit 2 is connected to the RAM data-bit 5 and CPU data-bus bit 5 is connected to RAM data bit 2? Assume the rest of the connections are all right – explain.
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1 vote
1 answer
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Do number of registers and width of register have to be the same?

I am studying Computer Architecture with MIPS-32. The example system has 32 registers with each register having a width of 32 bit. If I would want 128 registers instead of 32 registers, would I have ...
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20 votes
9 answers
4k views

Would it be wrong to say that the processor (and hardware) is the implementation of an interpreter for machine language?

The question is basically in the title. I know that a computers hardware is of course some physical object, where as the interpreter is some abstract thing that does something abstract with the code ...
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0 votes
1 answer
64 views

What determines bus speed?

I would like to know what determines bus speed in a CPU. I know about bus width, that all makes sense, but since electrical pulses travel at light speed I don't understand why bus speed is measured ...
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