Questions tagged [computer-architecture]
Questions about the organization and design of computer hardware.
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Queueing Delay Calculation
I would like to ask a question regarding queueing delay.
All packets have the same size: L=14*10000bits
The link capacity is 1000000bps
The processing delay is 2us.
The propagation delay is 300us.
if ...
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Within the set of signed integers representable by a bit string of length n, are any two elements equivalent to each other mod 2^n?
Donald Knuth's The Art of Computer Programming, Volume 1 Fascicle 1 contains the following exercise:
If $\alpha$ is any string of 0s and 1s, let $\operatorname{s}(\alpha)$ and $\operatorname{u}(\...
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How does caching, paging, virtual memory, and OS all tie together for UNIX copy-on-write?
In my OS course, the instructor mentioned the following: In UNIX if a parent process creates a new child ("fork") then the child is an exact duplicate of the parent. This means its memory ...
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How efficient is register renaming?
As I understand, all modern CPUs perform register renaming: given a sequence of instructions to interpret, they check which registers these instructions use, detect patterns where a register's ...
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CPU limit for bitap algorithm bitmask
We have bitap (shift OR) algorithm that searches for a substring in a text.
Bitap algorithm uses bit masks, so that it can perform bitwise operations very fast with the help of CPU.
For example:
...
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Is this how endianess work relative to memory?
So I've been trying to understand endianess for the past couple of days but I'm not sure if I'm overthinking this or not and I don't have anyone I can ask to confirm things.
Here is how I look at ...
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Is the reason for a stack to decrease the size of a program (by adding the use of subroutines)?
The stack allows subroutines to be used. It can store return address for "return from subroutine" instruction (RTN) and also arguments for the function.
It is not possible to store return ...
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Help with a question on write-through and no-write allocate in caches
I am struggling with this question as I am not sure whether the answer that has been provided is correct or not. The image should be sufficient to tell the question.
The attached image is of the ...
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What is my mistake in applying the division algorithm using subtract and shift?
The following division hardware is from computer organization and design RISC-V 2nd edition 2020, section 3.4.
Using this hardware and its related algorithm, I want to calculate 43 / 2. I use 6 bit ...
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To where is the mouse sending signals of a computer?
When we move the mouse, we can see the cursor moving on the monitor. I know that mouse can send signals according to its movements. Which component of a computer is receiving those signals in the ...
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Von Neumann Architeture
Recently I came across with a question about Von Newman architecture (which is usually used) and whether the following statement is true or not?
In Von Neumann architecture data are stored in disk and ...
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Perform subtraction micro operation R3←R1-R2 where R1=1011 and R2=1100
From tutorials point:
Subtract micro-operation are using minus operator we create 1's complement and add 1 to the register which obtains subtracted, i.e R1 - R2 is similar to R3 → R1 + R2' + 1
$$
R2'...
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How many bits are needed to reference physical vs virtual addresses?
I trying to learn about virtual memory at the moment and one of the explanations I've look at has a diagram like below. You can see that 32 bit virtual addresses are used so the virtual address space ...
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K-Maps (Digital Logic, Computer System Architecture)
While i was going thru my course in Computer System Architecture (book taken Morris Mano) , I saw a question on KMaps can be solved in either of the ways but couldn't get which one to use when :-
I’m ...
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Are variables stored again in RAM?
Assuming this set of instructions:
declare variable 'A' which has value 5
declare variable 'B' which has value 2
From what I've understood, those instructions are loaded into RAM an then read by CPU,...
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Why is static recompilation not possible?
I'm researching static recompilation but there doesn't seem to be too much information about the subject. I've heard that dynamic recompilation (emulation) can be up to 6 times slower than native ...
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What is the most critical component of a processor? [closed]
We know that there are basically 3 fundamental parts of a processor namely :
Control Unit (CU)
Arithmetical Logic Unit (ALU)
Clock
Also we know that they maintain several important and different ...
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Tomasulo's Algorithm: Is there one reservation station per functional unit?
In Tomasulo's algorithm, is there only one reservation station per functional unit (even with multiple same-function FUs like, say, 3 adders)? Can there be more?
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Page/Frame VS Block
I am bit confused on these terminologies.
While studying Paging of Operating System we study about Page and Frame.
Size of one Frame of Main Memory = Size of one Page of a Process
While studying ...
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Is the memory layout actual or virtual?
In many computer architecture books (e.g. Computer Organization and Design), the memory layout that is seen by a program is as the following figure.
But I wonder about multitask computers, in which ...
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If a process needs more RAM, does the Page size simply get bigger or does it get a new page?
Let's say I have a Operating System with 4KB page size, but I need to allocate 8kb of memory for all the variables. Does the Process get new page (second one) or does the current page table simply get ...
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What happens in harvard architecture pipelining if cpu needs to write data and fetch data at the same time?
What happens if Operand Fetch and Write Back happen in same cycle?
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Formal proof for in-balanced pipeline throughput
It is a well known fact, the throughput of a given compute pipeline (say, CPU instruction pipeline) is determined by its "slow" segment.
All the resources I've seen so far, demonstrates this ...
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Risc v Instruction format
Why do you think the Immediate type instructions are limiting its immediate values to only 12 bits, while upper immediate type instructions can handle immediate values of 20 bits.
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Understanding the faster multiplication hardware in riscv
I found a one question I wonder, but there is something to be clear about.
The link is https://electronics.stackexchange.com/questions/56488/parallel-multiplication-hardware/56518#56518
Q1. In his ...
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What is a procedure?
Non-computer scientist here, trying to understand what SICP (Structure and Interpretation of Computer Programs) means by a procedure, whether it matches the dictionary definition, and also how a ...
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How does instruction set architecture affects clock rate?
According to the computer organization and design RISC-V 2nd edition 2020, section 1.5, the following table states that ISA affects clock rate.
Hardware or software component
Affects what?
How?
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Solving an ambiguity concerning unsigned and signed integers [duplicate]
I am taking a class in computer science and I am not sure about the following. When one transforms $247_{10}$ into its binary counterpart one gets $11110111_2$. However, the same binary number ...
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translating operations per second (OPS) to floating point operations per second (FLOPS)
I have some algorithmic complexity estimates in Giga Operations Per Second (GOPS) and I would like to compare those with the capabilities of state-of-the-art processors. However, the processor ...
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Is assembly macros part of operative system / kernel, or lower down and more seen as hardware?
Update: To clarify. MyNOR (http://mynor.org/) stores some combined instructions in ROM to make programs take up less space. It seems very possible that instruction sets for CPUs might do similar, in ...
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How hardware write a byte in memory?
I want to know how hardwares write a byte in memory?
If there is difference between writing process in RAM and ROM I would like to know as well.
Specially I want to know:
Is hardware writes values ...
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Why do computers become slow over time (HW PoV)?
I'm a SW engineer. I'm just curious why computers become slow over time.
"Slow" here I mean from a usual user PoV:
It takes more time to launch an application.
Application UI takes longer ...
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Is kernel essentially an implementation of system calls?
In essence, is kernel basically the code that implements a set of system calls?
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Execution Time in Stage Pipeline
Exam Question:
A five-stage pipeline has stage delays of 150,120,150,160 and 140 nanoseconds. The registers that are used between the pipeline stages have a delay of 5 nanoseconds each.
The total time ...
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How to do signed 16-bit arithmetic on an 8-bit processor?
For example, to add two 16-bit numbers on my 8 bit machine, I add the low bytes together, then the high bytes together, and then add the carry flag to the high byte of the output.
This strategy falls ...
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compute cache miss rate by given code
I have been trying to solve questions like this before but I have stumbled in difficulty to track the the space of the cache.
so there is an example of a question like this:
Given the code:
...
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Is the executable always loaded to the same place in the text segment?
I am reading a book about data architecture, and I am wondering about the text segment and the memory adresses.
In one example(assembly using ARM) where the code was compiled there were adresses to ...
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Reference/notes for introduction to (von Neumann) architecture
I am interested in understanding what we mean by a von Neumann architecture and need something at a very introductory level. Does anyone know of any good and readable references or notes that will ...
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What does it mean to have the processor ignore interrupt request line?
I was reading a textbook on COA, it says
If the processor is going to ignore the interrupt request line till the execution of the first instruction of the ISR, how will it know which device to ...
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Page fault question
How many page faults are there in the following accesses of pages in case of FIFO mechanism where page frame size is 8?
$$11,21,23,53,8,7,10,3,3,38,3,37,7$$
Soln: This question appeared in one of my ...
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Are really only ~1% of the physical CPU space used for computing
In a Talk by Herb Sutter C++ and Beyond 2012: Herb Sutter - atomic Weapons 1 of 2 at 46:30 the point is made that only around 15% of the physical space (or the transistors) on a CPU do actual ...
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How do we run programs which are bigger than RAM itself
I know that whenever click on .exe, it will be moved into RAM so cpu can execute machine code line by line. But what if .exe is bigger than RAM?
for eg: I play games which take up more space than my ...
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Belt-based mechanical computers
I've seen a lot of mechanical computers based on gears and rigid rods, but none so far that consequently use belts (not chains) for transmission of information.
Belts allow for easy negation (by ...
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Resources to learn about the fundamentals of computers? [duplicate]
I have been wanting to learn more about how computers work. Getting way ahead of myself, but as in would it be possible to build a computer from scratch by myself? I mean build the individual parts ...
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Why do we rely on computers in critical fields?
I assume that computers make many mistakes (like errors, bugs, glitches, etc.), which can be observed from the amount of questions asked everyday on different communities (like Stack Overflow) showing ...
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How many CPU cores are there in the world?
I have read some articles about how much total storage capacity there is in the world (eg. https://www.quora.com/Whats-the-worlds-total-data-storage-capacity), and I wondered how many CPU cores are ...
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which devices use parity checking?
I've just started learning computer architectures and I'm having trouble understanding where these are used.
I know that parity checking is testing for accurate data transmission between nodes in a ...
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What kinds of operations do modern GPU (Ampere architecture in particular) perform on FP or INT processing units?
I have a cool algorithm that I've designed while using my laptops M4000M(maxwell) graphics card. I'm looking to get a beefier desktop card to add more oomph to my calculations but find myself in a ...
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What kind of data does L1, L2, L3 cache hold?
I understand that caches are the smallest and fastest memory that is integrated into the CPU. However, what I am confused about is the information that it holds. From what I know, the capabilities of ...
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Is there any video where I can see how different data rates impact daily activities?
I've been learning about data speed and width and the rate of the bus where information is transmitted between components. But I can't see or understand how fast is the transmission.
For example, in ...
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