Questions tagged [computer-architecture]

Questions about the organization and design of computer hardware.

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10
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11k views

Word- or byte-addressable? Correct terminology

Seemingly, a byte has established itself to be 8bit (is that correct?). RAM and NOR-flash can be normally accessed on a quite granular level, but it is up to the system architecture to determine if ...
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1answer
402 views

Why using Hyper-threading can lead to performance degradation

I have read it at various places like this, that Hyper-threading leads to performance degradation. I am unable to get why or how hyper-threading leads to degradation. Why it is so that even when Hyper-...
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1answer
287 views

Can the end-to-end principle be formalized?

In the late 1990s, when I was in graduate school, the paper JH Saltzer; DP Reed; DD Clark: End-to-end arguments in system design. ACM Trans. Comput. Syst. 2(4):277-288, 1984. DOI=10.1145/357401....
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4answers
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Why do we need so many transistors in a chip, and how are they managed?

My knowledge is very vague as all we have are visual diagrams etc, but we have memory address and registers, the ALU being the heart(apparently). Single core CPUs process one instruction at a time ...
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4answers
14k views

What is meant by interrupts in the context of operating systems?

I've decided to read Operating Systems Concepts by Silberschatz, Galvin Gagne (8th edition) over the summer. I've gotten to a topic that's confusing me - interrupts and their role as it relates to ...
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2answers
49k views

Cache Direct Map (Index, tag, hit/miss)

Alright, I thought I understood this concept but now I am confused. I looked up similar problems and their solutions to practice, and that's what threw me off. The question is a homework problem which ...
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1answer
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What is oblivious RAM and how does it work?

Could anybody explain me what exactly oblivious RAM is? I found the following explanation which makes it kind of clear to me, but I would like to get a sense of the technical aspects: Encryption ...
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2answers
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Does the aliasing problem show up in a virtually indexed physically tagged cache?

Basically, and as a simple method, we can access cache with Physical Address which is from the TLB. But, as another method, we can access cache with Virtual Address. But, in this case, if the cache ...
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Why is the CPU Involved During Keyboard Echo?

I'm currently studying for a computer science exam, and I've come across a concept that has me somewhat stumped. When one types a key on the keyboard, an ASCII character is transmitted to the CPU. ...
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4answers
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How does a computer play a video while doing something else?

How is video playback done on a computer? It's obviously not relying purely on the CPU, since video playback continues when a user performs another activity, such as typing into a YouTube comment ...
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3answers
20k views

Which architecture do modern computers use?

Is it one of: Harvard Modified Harvard von Neumann Or are they antiquated models that modern computers are only loosely based on? If you asked Intel or AMD what would they say?
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934 views

Is there anything lower than the bit level of 1s and 0s?

When learning about the architecture of computers and how it works, we are thought that the lowest language that we can find that the machine understands is binary as 1&0. And anything that we ...
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What happens at the decode phase of the instruction cycle?

I am reading about the various phases of the Instruction Execution, I found out that we have three phases like below. Fectch Decode Execute Now if the part I don't understand is why do we need a ...
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2answers
472 views

Mathematical model on which current computers are built

It is said that "The Turing machine is not intended as practical computing technology, but rather as a hypothetical device representing a computing machine. Turing machines help computer scientists ...
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2answers
20k views

Changing from Kernel mode to User mode (and vice versa)

I am reading Operating Systems book by Galvin. Galvin explains, what are kernel & user modes, instruction privileges given for both modes & also about mode-bit. But I am interested to know how ...
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1answer
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What is the exact difference between a latch & a flipflop?

From what I have understood : A Flip Flop is a clocked latch i.e. flip flop = latch + clock Latch continuously checks for inputs & changes the output whenever there is a change in input Flip Flop ...
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1answer
2k views

When do structural hazards occur in pipelined architectures?

I'm looking for some relatively simple examples of when structural hazards occur in a pipelined architecture. The only scenario I can think of is when memory needs to be accessed during different ...
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1answer
270 views

I built a mechanical computer powered by marbles. What are its theoretical limitations?

Over the last couple years, I built a mechanical computer powered by marbles and made a game out of it. It's similar to the old Digi-Comp II, except for two key differences: Parts are repositionable ...
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3answers
4k views

Exactly how many clocks does a Computer consists of and how do they synchronize with each other?

I am currently trying to understand how Computers are arranged and organized internally (so that I can learn Assembly Language) through an online book called The Art of Assembly by Randall Hyde. ...
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3answers
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The amount of ROM needed to implement a 4-bit multiplier?

For a 4-bit multiplier there are $2^4 \cdot 2^4 = 2^8$ combinations. The output of 4-bit multiplication is 8 bits, so the amount of ROM needed is $2^8 \cdot 8 = 2048$ bits. Why is that? Why does ...
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10k views

What is instruction throughput and instruction latency?

I was reading an article on an alternative method of modulo reduction and i couldn't understand the following excerpt (Those in bold) : "A single 32-bit division on a recent x64 processor has a ...
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2answers
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RAM can be accessed hundreds of times faster than a hard drive. Explain How?

I have been reading this for quiet a long time that "RAM can be accessed hundreds of times faster than a hard drive". But, no one has been able to explain it properly. I searched on Internet and ...
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1answer
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Where does the CPU get its first instructions from?

In order for the BIOS code to matter, it must be evaluated by the processor. However, the processor itself needs to do work to actually get access to the BIOS code, since the CPU only performs ...
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1answer
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Confused by Floating Point Spacing

I'm currently taking a numerical analysis class in college and we're covering floating point systems. For the most part, I have a good grasp on it. However, something I can't seem to visualize, and ...
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1answer
164 views

Do most computational efficiency increases due to increased transistor count in the last 70 years depend on some kind of parallelism?

Modern personal computers as far as I understand have increased in power (measured informally by ability to compute “more demanding programs”) due to two “broad factors”: decreased transistor size (...
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1answer
256 views

What techniques exist for energy-efficient computing and networking?

I am currently reviewing the potentials of cloud computing regarding energy efficiency and green IT. In connection with this review I am having a look on techniques for increasing energy-efficiency in ...
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3answers
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CPU and GPU differences

What is the difference between a single processing unit of CPU and single processing unit of GPU?  Most places I've come along on the internet cover the high level differences between the two. I want ...
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0answers
495 views

Is there any defined programming model for 'Self-Learning' NPUs?

Qualcomm is creating a Neuromorphic Processing Unit or an NPU called zeroth. IBM is also working on a brain inspired chip under Synapse program. Standford's Neurogrid might be a similar example. ...
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1answer
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Tag, index and offset of associative cache

My main issue of a homework problem is trying to figure out the different parts of the chart. I have a 3 way set associative cache with 2 word blocks, total size of 24 words. I am given $3, 180, 43, 2,...
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3answers
961 views

Where should I start to understand how computers work? [duplicate]

I am interested in how computers work but I have no idea how the concept of 0's and 1's converts to making possible for people to control a computer by programming. I would like to understand from ...
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3answers
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Write Serialization for Cache Coherence in the presence of Store Buffers

One of the requirements for a coherent memory system is write serialization - "two writes to address X by any two processors are observed in the same order by all processors". I am not sure how this ...
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12answers
9k views

Who converts binary/machine code to electrical signals and how?

I went through lots of blogs and posts but could not exactly figure out how the machine code is converted to electrical signals? Any software program is compiled to machine code which is nothing but ...
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3answers
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What is Simultaneous Multithreading

I come from an electronics background. I know that there are three types of implementations of multithreading (see Computer Architecture: A Quantitative Approach, 5th Edition): Fine-grain ...
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1answer
885 views

Are multiple interrupts generated when I hold down a key on my keyboard?

When I hold down a key on my keyboard, a continuous stream of characters is generated and is displayed on the text editor, Now since pressing a key is a hardware interrupt, so does holding down a key ...
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2answers
4k views

How does CPU actually retrieve data from memory when you call a variable in a programming language?

As I have understood from all the internet sources I can get to, when you declare and initialize a variable in java, you are allocating this data, say an 8-byte float, in a particular memory cell in ...
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2answers
3k views

Why do you have to worry about cache coherence if you are using shared memory?

Wikipedia says that shared memory comes with lots of costs associated with cache coherence costs. But I thought the whole idea of shared memory is that all the CPUs access the same memory? So if one ...
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1answer
2k views

What does “Outstanding” mean in the context of architecture?

I'm taking an Advanced Computer Architecture course and I've come across the term "outstanding" a few times and I've searched online about what it means in the context of computer science/...
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3answers
5k views

Finding cache block transfer time in a 3 level memory system

Following question was asked in one of entrance exams for a graduation programme. Please help me try to solve it : A computer system has an L1 cache, an L2 cache, and a main memory unity connected as ...
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2answers
906 views

Why is word-addressable the exception, not the rule?

As stated on Wikipedia: Most modern computers are byte-addressable instead of word-addressable. Why is this case? Since the CPU processes words (of predominantly 64 bits or 8 bytes) now, wouldn't ...
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2answers
6k views

Why is the Mean Time To Failure of multiple disks calculated via division and not multiplication?

I am reading about disk redudancy. I read the following: Suppose that the mean time to failure of a disk is 100,000 hours. Then the mean time to failure of some disk in an array of 100 disks ...
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1answer
515 views

Why can L3 caches hold only shared blocks?

In a recent CACM article [1], the authors present a way to improve scalability of shared and coherent caches. The core ingredient is assuming the caches are inclusive, that is higher-level caches (e....
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1answer
2k views

Why is a superscalar processor SIMD?

From http://en.wikipedia.org/wiki/Superscalar In Flynn's taxonomy, a single-core superscalar processor is classified as an SIMD processor (Single Instructions, Multiple Data), Flynn's taxonomy ...
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1answer
329 views

Realtime hardware/software versus PC software/hardware, how are these distinct and alike?

This question stems from a few answers and comments on a question I posted in signal processing found here. I guess I am a little confused. Are there any concrete differences between realtime ...
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3answers
168 views

What happens when the words transfered on the bus are smaller than its width?

So what happens if we're transfering lots of 8 bit words in a 32 bit bus? Does each bus cycle only transfers 8 bit at the time, wasting the other 24 lines of the bus? Or does it transfer 4 words in ...
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2answers
144 views

What are the treatises on how to build mechanical computers?

I've just watched this replica of the Antikythera mechanism. I've heard also about Babagge's analytical machine and the Curta calculator. I got curious: What did they use to build computers made of ...
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5answers
2k views

Does any CPU not contain an ALU?

Is there any kind of CPU which doesn't contain an ALU ?
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3answers
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Is order of bits in byte really not of concern?

What I can't wrap my head around is sentence repeated everywhere I look, that order of bits in byte is not important(not of my, as a programmer, concern). My question then is if there is possibility ...
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4answers
17k views

Difference between an a microcontroller and a system on a chip?

I pulled this right from Wikipedia to compare, staring with an SoC: A system on a chip or system on chip (SoC or SOC) is an integrated circuit (IC) that integrates all components of a computer or ...
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2answers
3k views

Is a 2 address machine more likely to follow a RISC or CISC design?

The Problem: If I have a 3 address machine, is my machine more likely to follow RISC or CISC design? 2 addresses? 1 address? 0 address. To solve this problem I first looked up the different ...
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2answers
18k views

What is difference between architecture and microarchitecture?

I am studying computer architecture. I would like to know the difference between the terms "computer architecture" and "microarchitecture".

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