Questions tagged [digital-circuits]

Digital circuits use logic gates as the basic building block. A logic gate performs a logical operation on binary inputs and produces a single binary output. The Primary Logical operations are AND (conjunction), OR (disjunction) and NOT (negation).

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Combinational logic check if bits is prime

I wonder if there's Digital Logic Circuit (using combinatorial logic gates) that check if number is prime or not. For example given input fixed 8-bit that will produce 1-bit output. 00000101 will ...
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Need to define output functions from logic circuit

i was given a this circuit as exam question So we need to define functions g and f. I defined them as $g(x,y,z) = x \oplus y \oplus z$ and $f(x,y,z) = (x \oplus y) \cdot z$. By definition known that ...
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Decoder inputs and outputs given in brackets. What does it mean?

I am given that the inputs and the output of a decoder are B(1:0) and R(3:0) respectively. What should be R if B is 01₂? I don't understand what format the input and outputs are given in. Can someone ...
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How are instructions from software sent to digital circuit in cpu?

I am studying computer architecture in my university and there is something that's troubling me. I get the bigger picture of how instructions are executed in the fetch - execute cycle and the complete ...
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A query regarding Definition of Circuit Family and Languages

This is a query regarding the definition of Circuit Family and Language (in the same Context). The textbook definitions of each are: Language: A function whose inputs and outputs are a finite bit of ...
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Alu architecture of a Hack Computer

I'm currently studying the ALU architecture (of a Hack computer) and how it works. As part of my assignments, I have been asked the following question: If we want the ALU to compute the function y-1, ...
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How many functions require precisely $n^2$ gates?

I'm trying to determine an asymptotic bound on the cardinality of the following set of functions. It is the functions with $n$-bit inputs, $\{0,1\}$ output, and requires precisely $n^2$ NAND gates. I'...
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Make the forward counter go down

Suppose, I have a 4-bit binary Incrementor that uses XOR gates to increment the inputted number by the value of 1 (b0001, to be precise). Suppose, we connect it to 4 D-Flip-Flops (DFF) to create a ...
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Number of possible boolean functions in a DAG of lookup tables?

A K-input lookup table (K-LUT) can represent any function with K boolean inputs and a single boolean output. The number of possible functions represented by this LUT is $2^{2^K}$ according to this ...
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Mechanism of Howard's algorithm

How does Howard's algorithm avoids re-mapping of the non-critical nodes ?
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What is combinational circuit?

I'm reading the Digital Design and Computer Architecture by David Harris, Sarah Harris. The authors give the following definition of combinational logic: A combinational circuit’s outputs depend only ...
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How do I compute the power consumption of a DRAM refresh?

Given a DRAM-based memory system with a total capacity of $x$ bytes, $y$ DRAM rows and a refresh time of $t$ milliseconds, how do I compute the power consumption for one DRAM refresh? I couldn't find ...
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What is the intuitive logic behind the working of the Variable Entered K-Map (VEM)?

In this site here they have just said how to minimize a function using VEM. But no intuitive logic behind the same has been stated, making it too mechanical. And I am very bad at memorizing things, so ...
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is duality principle in boolean algebra is true for every expression

Let say A = 1 and B = 1 and then A+B = 1 now by using duality(replacing or gate by and gate and 1 by 0) we can say that, A.B = 0 but this is not 0, because 1.1 = 1, so please anyone clear my ...
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Karnaugh Map: does maximal overlap always produce simplest boolean expression?

Suppose I have a 4x4 Karnaugh map with a few cells that are don't cares, and there are two ways of producing 3 groups of 4 cells. One of these ways overlaps groupings more that the other. Is one way ...
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Proof of universality in the circuit model

I'm starting to study Turing machines, the Church-Turing conjecture and the circuit model. In particular, I'm interested in the proofs of universality that one can find in this context. So far, I have ...
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Building an ALU on nandgame's website

I'm working on nandgame's website found here. I'm working on the ALU and here is an image of my implementation: My Implementation: And I compared it to this website's solution: Solution However when ...
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How to calculate the output frequency of this counter?

The present state Q2,Q1,Q0 of the counter before applying the clock pulse was (101). If the input Clock frequency to the circuit is 100KHz, then the output frequency of the circuit will be ? My ...
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What can this circuit be useful for?

I have calculated the boolean functions for $r$ and $f$: $f = \overline{s_1} \cdot s_0 + s_1 \cdot \overline{s_0}$. $r = \overline{s_0 \cdot s_1 \cdot s_2 \cdot s_3}$. Do you have an idea what an ...
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How does the structure of a Luk-Vuillemin multiplier differ from a Wallace or Dadda multiplier?

I've read that Luk-Vuillemin multipliers are similar to Wallace multipliers but partition their inputs in a different way. How exactly does this partitioning work, how does it change the structure of ...
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Full adder carry expression

I'm learning about logic circuits and I've come across full adder. In the book they derived its two carry out expressions - Cout = x&&y || x&&z || y&&z and Cout = x&&...
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Is this truth table possbile

I am trying to figure out if this truth table is possible. I've tried inverting the numbers, adding them, subtracting them, but I still cant find anything that works. I am starting to think that this ...
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How do you compute and compare the delays between a (4:2) compressor and (3,2) counter carry save tree?

My question: How is Table 6.8 shown below computed for different operands? For example, for 3 operands how did they compute: Number of levels using (3,2) = 1 Number of levels using (4;2) = 1 ...
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Which gates are “pre computation” universal?

In the following, by “functions” I will mean 2 input 1 output Boolean logic functions (for conciseness). A function is called “universal” if by using it (sometimes multiple times, chained together), ...
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Minimizing a multiple output circuit with K-maps - and without

I'm currently working on learning to minimize a circuit which has multiple outputs using K-maps. My universities script seems rather unhelpful to me which left me in a spot where I have a very rough ...
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Minimum number of bits to represent negative number

Minimum number of bits required to represent $(+32)_{base10}$ and $(-32)_{base10}$ in signed two's compliment form? My attempt: 32 = 0100000 ( 1st zero - sign bit as positive) So to represent +32 we ...
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Minimize circuit functions

$\begin{array}{rrrr | rr } 0& 0 & 0 & 0 & 1 &1 &1 &1 &1 & 1&0 \\ 0& 0 & 0 & 1 & 0 &1 &1 &0 &0 & 0&0 \\ 0& 0 & 1 &...
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Addition of 3 bits using Full Adder when the initial carry bit is 0

How do I add 3 bits using full adder and basic gates, when the initial carry bit is 0?? I have tried using two full adders where two terminals of the first adder gets the first two inputs then the ...
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Hamming code distance and error detection

Suppose that data are transmitted in blocks of sizes 1000 bits. What is the maximum error rate under which error detection and retransmission mechanism (1 parity bit per block) is better than using ...
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2 votes
2 answers
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Prime Implicants in Boolean Function

A Boolean function $F(X_1, X_2, X_3, X_4, X_5, X_6)$ of six variables is defined as $F = 1$, when three or more input variables are at logic 1. otherwise 0. How many essential prime implicants does F ...
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Efficient method for generating the smoothing function

The smoothing function of a boolean function with respect to one of its variables is the disjunction of its cofactors. For example given a Boolean function F(a,b,c) the cofactors with respect to a are ...
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Minimum no. of flip flops for the given sequence

We want to design a synchronous counter that counts the sequence 0-1-0-2-0-3 and then repeats. The minimum number of flip-flops required to implement this counter is________ According to me, the ...
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Simplifying SOP: implementing OR with NAND

I am learning how to implement basic logic gates using NAND. I have learnt that you can use De Morgan's theorem as such: $a+b = \bar{\bar a} + \bar{\bar b} = \overline{(\bar a *\bar b)}$ In other ...
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Register output glitches and memory writes

When changing the write enable signal, of a memory element, from 1 to 0, what effect does the pipeline's register's output glitch have? Glitch that all of digital logic has, for the time of ...
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Number of literals in the given boolean expression

Count the number of literals in the following expression : F = AB' + BC' + CD' + DE' According to me, the answer should be 8. But my solution suggests that the answer should be 6. Can anyone help me ...
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2 votes
1 answer
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What is the behavior of the given counter?

I found the following question - For the circuit shown in the figure, the delay of the bubbled NAND gate is 2ns and that of the counter is assumed to be zero If the clock (Clk) frequency is 1GHz, ...
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How to make counters for irregular integral pattern?

I can easily make counter for consecutive numbers. But for patterns, described in below question, I'm quite unsure about my approach. Question - We want to design a synchronous counter that ...
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4 votes
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Analog circuits for neural networks?

Neural networks in machine learning are inherently a continuous model of computation. Yet we use digital logic circuits with floating point numbers to "emulate" this continuity. I am wondering: is ...
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5 votes
1 answer
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Trick/insight to I implement given boolean function with minimum numbers of given gate

I solved bunch of questions which give some function and then ask to implement it with minimum number of gates of specific type, each having specific number inputs. I was making mistakes in all those ...
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SIMD Utilization

Can anyone help me understanding this exercise? We define the SIMD utilization of a program run on a GPU as the fraction of SIMD lanes that are kept busy with active threads during the run of a ...
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Two dimensional 3 bit parity check

Can someone explain how do we find these parity bit errors?
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Carry Look Ahead Adder for stabilize the sum

An four-bit carry-look-ahead adder for computing the sum of 2 numbers , where A and B are integers represented in 2's complement form. If the decimal value of A is 3, the decimal value of B that leads ...
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What is Control ROM and Decision ROM?

I have done some research but I cannot answer this question. Please Help.
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Logic Gates in circuits

We can make all the gates using nand or nor gates. My teacher told us that nand gates are cheap too, then why do we need other gates at all?
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How to find states in logic circuits?

For hobbyist reasons I wrote a program which takes the equations of the logic gates of a digital circuit as input, does some analysis, outputs the analysis results and generates program code for doing ...
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1 answer
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Caesar Cipher - logic circuit [closed]

my teacher asked the class to do a digial circuit that encrypted a message using cesar's cipher, and a circuit to decrypt, but my only idea is to solve it using a circuit that does P + K mod N, where ...
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75 votes
9 answers
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Why is addition as fast as bit-wise operations in modern processors?

I know that bit-wise operations are so fast on modern processors, because they can operate on 32 or 64 bits on parallel, so bit-wise operations take only one clock cycle. However addition is a complex ...
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circuit for finding the index of first zero entry in a binary string

finding the index of first zero entry in a binary string: Input: binary string ($0$'s and $1$'s) Output: index of first zero entry Can you give a circuit for finding the index of first zero entry ...
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Converting Boolean Expression for NAND Gate Implementation - DeMorgan's Law

If I have the sum-of-products expression B~CD + ACD how would I convert this so it could be implemented using 3-input NAND gates through DeMorgan's Law? Would this ...
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5 votes
1 answer
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Size of constant depth circuit for digital comparator?

Is a lower bound of $\Omega(n^2)$ known for the size of any constant depth circuit expressing a digital comparator for two $n$-bit numbers? Two $n$-bit binary numbers can be compared using a digital ...
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