Stack Exchange Network

Stack Exchange network consists of 175 Q&A communities including Stack Overflow, the largest, most trusted online community for developers to learn, share their knowledge, and build their careers.

Visit Stack Exchange

Questions tagged [digital-circuits]

The tag has no usage guidance.

2
votes
2answers
43 views

Prime Implicants in Boolean Function

A Boolean function $F(X_1, X_2, X_3, X_4, X_5, X_6)$ of six variables is defined as $F = 1$, when three or more input variables are at logic 1. otherwise 0. How many essential prime implicants does F ...
3
votes
1answer
41 views

Efficient method for generating the smoothing function

The smoothing function of a boolean function with respect to one of its variables is the disjunction of its cofactors. For example given a Boolean function F(a,b,c) the cofactors with respect to a are ...
1
vote
0answers
24 views

Minimum no. of flip flops for the given sequence

We want to design a synchronous counter that counts the sequence 0-1-0-2-0-3 and then repeats. The minimum number of flip-flops required to implement this counter is________ According to me, the ...
0
votes
1answer
51 views

Simplifying SOP: implementing OR with NAND

I am learning how to implement basic logic gates using NAND. I have learnt that you can use De Morgan's theorem as such: $a+b = \bar{\bar a} + \bar{\bar b} = \overline{(\bar a *\bar b)}$ In other ...
0
votes
0answers
24 views

Register output glitches and memory writes

When changing the write enable signal, of a memory element, from 1 to 0, what effect does the pipeline's register's output glitch have? Glitch that all of digital logic has, for the time of ...
0
votes
1answer
43 views

Number of literals in the given boolean expression

Count the number of literals in the following expression : F = AB' + BC' + CD' + DE' According to me, the answer should be 8. But my solution suggests that the answer should be 6. Can anyone help me ...
2
votes
1answer
40 views

What is the behavior of the given counter?

I found the following question - For the circuit shown in the figure, the delay of the bubbled NAND gate is 2ns and that of the counter is assumed to be zero If the clock (Clk) frequency is 1GHz, ...
0
votes
0answers
16 views

How does an accumulator with an upper and lower half work?

In the article "The IBM Magnetic Drum Calculator Type 650", originally published in Vol. 1, Issue 1 of Journal of the ACM, the article describes a computer architecture with a single accumulator ...
0
votes
0answers
81 views

How to make counters for irregular integral pattern?

I can easily make counter for consecutive numbers. But for patterns, described in below question, I'm quite unsure about my approach. Question - We want to design a synchronous counter that ...
2
votes
1answer
194 views

Analog circuits for neural networks?

Neural networks in machine learning are inherently a continuous model of computation. Yet we use digital logic circuits with floating point numbers to "emulate" this continuity. I am wondering: is ...
4
votes
1answer
19 views

Trick/insight to I implement given boolean function with minimum numbers of given gate

I solved bunch of questions which give some function and then ask to implement it with minimum number of gates of specific type, each having specific number inputs. I was making mistakes in all those ...
0
votes
1answer
122 views

SIMD Utilization

Can anyone help me understanding this exercise? We define the SIMD utilization of a program run on a GPU as the fraction of SIMD lanes that are kept busy with active threads during the run of a ...
0
votes
0answers
13 views

synchronous sequential circuits v/s asynchronous

I was studying about Advantage of synchronous sequential circuits over asynchronous ones and I am confused that which one has lower hardware requirement?
0
votes
1answer
118 views

Two dimensional 3 bit parity check

Can someone explain how do we find these parity bit errors?
0
votes
0answers
21 views

Moore diagram circuit

Fig. 3-3 is a Moore type sequential circuit composed of a positive edge triggered D flip-flop and a combinational circuit. X is input, Y is an output, and CLK is a clock. Please show how Qo, Q1, and Y ...
0
votes
0answers
22 views

Carry Look Ahead Adder for stabilize the sum

An four-bit carry-look-ahead adder for computing the sum of 2 numbers , where A and B are integers represented in 2's complement form. If the decimal value of A is 3, the decimal value of B that leads ...
-2
votes
1answer
43 views

What is Control ROM and Decision ROM?

I have done some research but I cannot answer this question. Please Help.
0
votes
2answers
224 views

Logic Gates in circuits

We can make all the gates using nand or nor gates. My teacher told us that nand gates are cheap too, then why do we need other gates at all?
1
vote
0answers
47 views

How to find states in logic circuits?

For hobbyist reasons I wrote a program which takes the equations of the logic gates of a digital circuit as input, does some analysis, outputs the analysis results and generates program code for doing ...
1
vote
1answer
129 views

Caesar Cipher - logic circuit [closed]

my teacher asked the class to do a digial circuit that encrypted a message using cesar's cipher, and a circuit to decrypt, but my only idea is to solve it using a circuit that does P + K mod N, where ...
69
votes
9answers
16k views

Why is addition as fast as bit-wise operations in modern processors?

I know that bit-wise operations are so fast on modern processors, because they can operate on 32 or 64 bits on parallel, so bit-wise operations take only one clock cycle. However addition is a complex ...
0
votes
0answers
88 views

circuit for finding the index of first zero entry in a binary string

finding the index of first zero entry in a binary string: Input: binary string ($0$'s and $1$'s) Output: index of first zero entry Can you give a circuit for finding the index of first zero entry ...
0
votes
1answer
535 views

Converting Boolean Expression for NAND Gate Implementation - DeMorgan's Law

If I have the sum-of-products expression B~CD + ACD how would I convert this so it could be implemented using 3-input NAND gates through DeMorgan's Law? Would this ...
5
votes
1answer
83 views

Size of constant depth circuit for digital comparator?

Is a lower bound of $\Omega(n^2)$ known for the size of any constant depth circuit expressing a digital comparator for two $n$-bit numbers? Two $n$-bit binary numbers can be compared using a digital ...
1
vote
1answer
602 views

Extracting Boolean Function using Machine Learning

How can machine learning help extract a Boolean relationship in a given binary input-output data set? Let us assume that the given data set is exhaustive - ie. it cover all possible input ...
4
votes
1answer
134 views

Using analog values with Algebraic Normal Form?

Algebraic normal form (ANF) is a way of describing digital circuits made up of AND and XOR gates. The below is an example of an ANF expression which evaluates to true if two or more of it's three ...
3
votes
1answer
56 views

Can bar codes theoretically be considered a type of digital memory?

Bar codes act just like any other device that contains data that you can read from. Can bar codes thus be considered a type of computer memory? I believe the principle is quite similar to the optical ...
4
votes
3answers
95 views

Is it possible to determine if C=A+B faster than adding A+B in logical circuits

With an adder circuit where A+B=C, I am trying to have a method to determine when C will be valid based on a change in A or B. I know that it is possible to just determine the longest the circuit ...
3
votes
1answer
238 views

General Approach To Calculate Minimum Number Of Flip-Flops Required

In the previous two years of the GATE exams, a question has been asked for finding number of flip flop's for counting sequence $0−1−0−2−0−3$ in 2016 and $0−0−1−1−2−2−3−3−0−0$ in 2015. But still, the ...
0
votes
0answers
592 views

Binary Division using logic gates

I am building a 64 bit CPU in Minecraft and I'm stuck on adding division into the ALU. I was told I should ask this here. Does anyone know how to divide in binary using only logic circuits? I can't ...
3
votes
1answer
285 views

Physical significance of Don't cares in Digital Logic design

In many Digital functions we come across don't care conditions where we use don't cares to minimize functions. What is the significance of these don't cares in real world scenario where we actually ...
-2
votes
1answer
93 views

two laws of De Morgans law and its used as NAND gates and NOR gates [closed]

how the all gates can be made by only these two . Yes i know the circuit diagram of basic gates by universal gates which i have learnt. but if there is complex circuit like XOR gate or any other ...
0
votes
0answers
37 views

How storage affect if we use tertiary language? [duplicate]

as we uses binary language in all the computer systems around us which consist of 0s and 1s (Off and On) bits. Let assume that someone is developing a computer system based on tertiary system -1, 0, 1 ...
0
votes
1answer
64 views

Difference between cordic algorithm and table based methods for elementary functions computation

In this book both Table Based methods and Cordic iterations are explained. computationally speaking i suppose the Table based is usually faster, even though it probably requires more resource, while ...
0
votes
1answer
57 views

At what point do electrical signals become actually logic and programmable language?

I get that one transistor can store a value of 1 or 0. That's not the problem. What I don't get is how the fact that a transistor represents a 0 can translate into logic? How do these transistors turn ...
-3
votes
2answers
444 views

D - Latch or D Flip Flop?

I have a diagram (http://imgur.com/cET8Q14) where it is either a D Latch or D Flip Flop. I am trying to figure out which one it is and why. If it is a D Flip Flip, I also need to know which input is ...
0
votes
0answers
95 views

Is there a complexity metric for digital circuits?

Let's say that I have a digital circuit made up of XOR and AND gates. Is there any way to describe the complexity of that circuit? I could just use the total number of gates, but gates being in ...
2
votes
1answer
467 views

Algorithm for simplifying ANF or polynomials?

I have some digital logic circuits in Algebraic Normal Form, and am limited to using XOR and AND logic gates. For instance: $B_{out} = B_1 B_2 \oplus B_1 B_3$ I was wondering, are there any ...
2
votes
2answers
279 views

Is there a canonical form that uses AND and XOR?

Is there something like the sum of products form of a circuit which uses AND and XOR instead of AND and OR? I know that you can create an OR gate from AND and XOR (but i can't remember or find the ...
2
votes
1answer
74 views

How does a register remember value?

So I am studying this great book, and Chapter $3.1$ is about registers. Quoting from this book / chapter: A register is a storage device that can "store" or "remember" a value over time, ...
1
vote
1answer
327 views

Simplifying Boolean Expression

I am designing a 4-bit comparator with a look ahead unit using a bit slice approach. I have to break the propagation of the Logical expressions for (A<B)i and <...
0
votes
0answers
72 views

Homomorphic computation?

Cryptography has the concept of homomorphic encryption. Homomorphic encryption lets you transform binary values into an encoded form, put them through a circuit and then decode the bits, getting the ...
1
vote
0answers
159 views

Understanding Computer organisation and architecture [closed]

What are some of the books for "computer organisation and architechture" which are best for self study. Such a text that one can grasps the big picture, and understandhow various things are fitting ...
2
votes
1answer
182 views

Why is c) a combinational circuit, but d) not?

I am doing practice after just learning what combinational circuits are, yet I am unsure of why (c) is combinational, but (d) is not. Can someone please explain to me why this is? The Solution ...
3
votes
1answer
393 views

Ripple Carry Adder

I'm new to computer science and came across an issue while learning about ripple carry adders. I'm trying to add binary 1+1+1 below (excuse the poor photoshopping). I know the answer should be ...
2
votes
1answer
4k views

Full Adder vs. Half Adder

I'm having some trouble figuring out where the "Carry in" value comes from in respects to a one bit full adder diagram. I understand the below half adder, but my question is: is the the output of ...
13
votes
2answers
2k views

Connection between NAND gates and Turing completeness

I know that NAND gates can be used to create circuits that implement every truth table, and modern computers are built up of NAND gates. What is the theoretical link between NAND gates and Turing ...
5
votes
1answer
199 views

Algorithms for logical synthesis of multiple output bits?

Karnaugh maps and the Quine–McCluskey algorithm can be good choices for coming up with fairly minimal logical expressions that match the requirements of a truth table. What if I have a situation ...
2
votes
2answers
107 views

Converting a digital circuit to two layers of OR and AND gates

The other day someone mentioned to me that you could take an arbitrary digital circuit which mapped N input bits to M output bits, and replace it with a layer of OR gates and a layer of AND gates. I ...
2
votes
1answer
35 views

Determining whether a digital circuit is optimal

Are there any techniques that can be used to determine whether a digital logic circuit is optimal, or if it has extraneous operations that don't contribute to the output? I'm especially curious in ...