Questions tagged [digital-circuits]

Digital circuits use logic gates as the basic building block. A logic gate performs a logical operation on binary inputs and produces a single binary output. The Primary Logical operations are AND (conjunction), OR (disjunction) and NOT (negation).

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Two dimensional 3 bit parity check

Can someone explain how do we find these parity bit errors?
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Carry Look Ahead Adder for stabilize the sum

An four-bit carry-look-ahead adder for computing the sum of 2 numbers , where A and B are integers represented in 2's complement form. If the decimal value of A is 3, the decimal value of B that leads ...
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What is Control ROM and Decision ROM?

I have done some research but I cannot answer this question. Please Help.
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Logic Gates in circuits

We can make all the gates using nand or nor gates. My teacher told us that nand gates are cheap too, then why do we need other gates at all?
Aniswar S K's user avatar
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How to find states in logic circuits?

For hobbyist reasons I wrote a program which takes the equations of the logic gates of a digital circuit as input, does some analysis, outputs the analysis results and generates program code for doing ...
Martin Rosenau's user avatar
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Caesar Cipher - logic circuit [closed]

my teacher asked the class to do a digial circuit that encrypted a message using cesar's cipher, and a circuit to decrypt, but my only idea is to solve it using a circuit that does P + K mod N, where ...
Otavio Augusto's user avatar
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9 answers
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Why is addition as fast as bit-wise operations in modern processors?

I know that bit-wise operations are so fast on modern processors, because they can operate on 32 or 64 bits on parallel, so bit-wise operations take only one clock cycle. However addition is a complex ...
Teodor Dyakov's user avatar
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circuit for finding the index of first zero entry in a binary string

finding the index of first zero entry in a binary string: Input: binary string ($0$'s and $1$'s) Output: index of first zero entry Can you give a circuit for finding the index of first zero entry ...
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Converting Boolean Expression for NAND Gate Implementation - DeMorgan's Law

If I have the sum-of-products expression B~CD + ACD how would I convert this so it could be implemented using 3-input NAND gates through DeMorgan's Law? Would this ...
Jack Morgan's user avatar
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Size of constant depth circuit for digital comparator?

Is a lower bound of $\Omega(n^2)$ known for the size of any constant depth circuit expressing a digital comparator for two $n$-bit numbers? Two $n$-bit binary numbers can be compared using a digital ...
András Salamon's user avatar
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Extracting Boolean Function using Machine Learning

How can machine learning help extract a Boolean relationship in a given binary input-output data set? Let us assume that the given data set is exhaustive - ie. it cover all possible input ...
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Using analog values with Algebraic Normal Form?

Algebraic normal form (ANF) is a way of describing digital circuits made up of AND and XOR gates. The below is an example of an ANF expression which evaluates to true if two or more of it's three ...
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Can bar codes theoretically be considered a type of digital memory?

Bar codes act just like any other device that contains data that you can read from. Can bar codes thus be considered a type of computer memory? I believe the principle is quite similar to the optical ...
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Is it possible to determine if C=A+B faster than adding A+B in logical circuits

With an adder circuit where A+B=C, I am trying to have a method to determine when C will be valid based on a change in A or B. I know that it is possible to just determine the longest the circuit ...
Eric Johnson's user avatar
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General Approach To Calculate Minimum Number Of Flip-Flops Required

In the previous two years of the GATE exams, a question has been asked for finding number of flip flop's for counting sequence $0−1−0−2−0−3$ in 2016 and $0−0−1−1−2−2−3−3−0−0$ in 2015. But still, the ...
Akhil Nadh PC's user avatar
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Binary Division using logic gates

I am building a 64 bit CPU in Minecraft and I'm stuck on adding division into the ALU. I was told I should ask this here. Does anyone know how to divide in binary using only logic circuits? I can't ...
Dodger99's user avatar
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Physical significance of Don't cares in Digital Logic design

In many Digital functions we come across don't care conditions where we use don't cares to minimize functions. What is the significance of these don't cares in real world scenario where we actually ...
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two laws of De Morgans law and its used as NAND gates and NOR gates [closed]

how the all gates can be made by only these two . Yes i know the circuit diagram of basic gates by universal gates which i have learnt. but if there is complex circuit like XOR gate or any other ...
Akshay Kathpal's user avatar
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How storage affect if we use tertiary language? [duplicate]

as we uses binary language in all the computer systems around us which consist of 0s and 1s (Off and On) bits. Let assume that someone is developing a computer system based on tertiary system -1, 0, 1 ...
Zeshan Sajid's user avatar
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Difference between cordic algorithm and table based methods for elementary functions computation

In this book both Table Based methods and Cordic iterations are explained. computationally speaking i suppose the Table based is usually faster, even though it probably requires more resource, while ...
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At what point do electrical signals become actually logic and programmable language?

I get that one transistor can store a value of 1 or 0. That's not the problem. What I don't get is how the fact that a transistor represents a 0 can translate into logic? How do these transistors turn ...
TinkerTek's user avatar
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D - Latch or D Flip Flop?

I have a diagram (https://i.stack.imgur.com/UK16E.jpg) where it is either a D Latch or D Flip Flop. I am trying to figure out which one it is and why. If it is a D Flip Flip, I also need to know which ...
Alex Park's user avatar
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Is there a complexity metric for digital circuits?

Let's say that I have a digital circuit made up of XOR and AND gates. Is there any way to describe the complexity of that circuit? I could just use the total number of gates, but gates being in ...
Alan Wolfe's user avatar
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Algorithm for simplifying ANF or polynomials?

I have some digital logic circuits in Algebraic Normal Form, and am limited to using XOR and AND logic gates. For instance: $B_{out} = B_1 B_2 \oplus B_1 B_3$ I was wondering, are there any ...
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Is there a canonical form that uses AND and XOR?

Is there something like the sum of products form of a circuit which uses AND and XOR instead of AND and OR? I know that you can create an OR gate from AND and XOR (but i can't remember or find the ...
Alan Wolfe's user avatar
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How does a register remember value?

So I am studying this great book, and Chapter $3.1$ is about registers. Quoting from this book / chapter: A register is a storage device that can "store" or "remember" a value over time, ...
Koray Tugay's user avatar
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Simplifying Boolean Expression

I am designing a 4-bit comparator with a look ahead unit using a bit slice approach. I have to break the propagation of the Logical expressions for (A<B)i and <...
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Homomorphic computation?

Cryptography has the concept of homomorphic encryption. Homomorphic encryption lets you transform binary values into an encoded form, put them through a circuit and then decode the bits, getting the ...
Alan Wolfe's user avatar
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Understanding Computer organisation and architecture [closed]

What are some of the books for "computer organisation and architechture" which are best for self study. Such a text that one can grasps the big picture, and understandhow various things are fitting ...
BigBang's user avatar
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Why is c) a combinational circuit, but d) not?

I am doing practice after just learning what combinational circuits are, yet I am unsure of why (c) is combinational, but (d) is not. Can someone please explain to me why this is? The Solution ...
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Ripple Carry Adder

I'm new to computer science and came across an issue while learning about ripple carry adders. I'm trying to add binary 1+1+1 below (excuse the poor photoshopping). I know the answer should be ...
Damir Demirovic's user avatar
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Full Adder vs. Half Adder

I'm having some trouble figuring out where the "Carry in" value comes from in respects to a one bit full adder diagram. I understand the below half adder, but my question is: is the the output of ...
Damir Demirovic's user avatar
19 votes
4 answers
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Connection between NAND gates and Turing completeness

I know that NAND gates can be used to create circuits that implement every truth table, and modern computers are built up of NAND gates. What is the theoretical link between NAND gates and Turing ...
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Algorithms for logical synthesis of multiple output bits?

Karnaugh maps and the Quine–McCluskey algorithm can be good choices for coming up with fairly minimal logical expressions that match the requirements of a truth table. What if I have a situation ...
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2 votes
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Converting a digital circuit to two layers of OR and AND gates

The other day someone mentioned to me that you could take an arbitrary digital circuit which mapped N input bits to M output bits, and replace it with a layer of OR gates and a layer of AND gates. I ...
Alan Wolfe's user avatar
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Determining whether a digital circuit is optimal

Are there any techniques that can be used to determine whether a digital logic circuit is optimal, or if it has extraneous operations that don't contribute to the output? I'm especially curious in ...
Alan Wolfe's user avatar
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Adder circuit with sign bit (not twos complement)

I've found and implemented a full adder to be able to do unsigned or two's complement addition on wikipedia: https://en.wikipedia.org/wiki/Adder_(electronics)#Full_adder However, in my particular ...
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Implementing a Boolean function with NOR gates

Implement f(a, b, c, d) = Σ m(3, 4, 5, 6, 7, 11, 15) as a 2-level gate circuit (a) Using OR gates and NOR gates. (b) Using NOR gates only. I have found that F=ab+d using Karnaugh map. I have also ...
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In fast multiplier circuits, what is the difference between a Counter and a Compressor?

When working on fast parallel multiplier circuit designs, like Wallace tree multipliers or Dada tree multipliers I found many papers and books refer to different components used in the tree to reduce ...
Alireza Tabatabaeian's user avatar
3 votes
2 answers
134 views

Classical Computation without NOT

Is it possible to do universal classical computation using bits and 2-bit gates when you cannot perform a NOT operation on a single bit (hence cant do CNOT and so on). If yes, what are the possible ...
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Digital Logic Settle Time

I have an exam tonight and I'm reviewing my midterm exam. I got this question completely wrong, with no solution given. ...
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2 answers
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Why is Computer Architecture in $2^n$ bits?

I have always wondered why is computer architecture in $2^n$ bits. We have 8 / 16 / 32 / 64-bit microprocessors or for that matter other parts of computer are also in power of 2 bits. The only logic ...
SimpleGuy's user avatar
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3 answers
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Is Karnaugh Map possible for Maxterms?

I read about Minterms i.e. sums of products, simplification using Karnaugh Graph. Can this graph be used for Maxterms, i.e. products of sums, as well? If yes, then how? If not, then is there some ...
SimpleGuy's user avatar
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Conversion from Decimal form to BCD

I have seen a way how to convert a decimal number to BCD (packed & unpacked) using 8,4,2,1 weighing forms but how to do it using 4,2,2,1 and 7,4,2,1 ? Any method please.Suggestions
tonny's user avatar
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Do Karnaugh maps yield the simplest solution possible?

I'm learning to use a Karnaugh map, but I'm not sure if I obtained the simplest expression possible. Have a look at this example: Truth table (inputs are A B C; output is F): ...
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How many possible prime implicants are there in total for a 4-variable Karnough-map? [closed]

The answer for this question is 81. But I count figure out why. Can someone explain to me how does this work. Thank you.
user10024395's user avatar
1 vote
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How to construct a truth table

Yes this is a homework problem, but I only need help setting it up, there are 7 parts to the question once I set it up: We want to build a function Y = 2X + 3 where X denotes a 3-bit unsigned ...
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Question on SR latch functionality

Below is the diagram of SR latch The following is the functional table as per my scrutiny . Sl.no S | R Q(t) | Q'(t) Q(t+1) | Q'(t+1) Q(t+2) | Q'(t+2) Q(t+3) | Q'(t+3) Remark ===== ...
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Difference between end carry and overflow

I am confused with end carry and overflow. When will an end carry be the overflow? How to identify whether the end carry is overflow or not? Are they both same? Sometimes end carries obtained are ...
hanugm's user avatar
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Karnaugh map with don't care: increasing the number of groups instead of simplifying

AB 00 01 11 10 00 | x | 1 | 0 | 1 | CD 01 | 0 | 1 | x | 0 | 11 | 1 | x | x | 0 | 10 | x | 0 | 0 | x | The answer to the ...
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