Questions tagged [memory-access]

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33
votes
5answers
11k views

How do computers remember where they store things?

When a computer stores a variable, when a program needs to get the variable's value, how does the computer know where to look in memory for that variable's value?
31
votes
8answers
16k views

How does a computer determine the data type of a byte?

For example, if the computer has 10111100 stored on one particular byte of RAM, how does the computer know to interpret this byte as an integer, ASCII character, or ...
15
votes
1answer
7k views

If the virtual address space can be larger than the physical address space, how are the address mappings stored in memory?

Let's say we are working with a system that has 40 physical address bits. The total physical address space (assuming byte-addressable memory) is $2^{40}$ bytes, or 1 TiB. And if virtual addresses are ...
10
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4answers
12k views

Word- or byte-addressable? Correct terminology

Seemingly, a byte has established itself to be 8bit (is that correct?). RAM and NOR-flash can be normally accessed on a quite granular level, but it is up to the system architecture to determine if ...
9
votes
1answer
3k views

What is oblivious RAM and how does it work?

Could anybody explain me what exactly oblivious RAM is? I found the following explanation which makes it kind of clear to me, but I would like to get a sense of the technical aspects: Encryption ...
8
votes
2answers
20k views

Changing from Kernel mode to User mode (and vice versa)

I am reading Operating Systems book by Galvin. Galvin explains, what are kernel & user modes, instruction privileges given for both modes & also about mode-bit. But I am interested to know how ...
7
votes
2answers
2k views

RAM can be accessed hundreds of times faster than a hard drive. Explain How?

I have been reading this for quiet a long time that "RAM can be accessed hundreds of times faster than a hard drive". But, no one has been able to explain it properly. I searched on Internet and ...
6
votes
2answers
5k views

How does CPU actually retrieve data from memory when you call a variable in a programming language?

As I have understood from all the internet sources I can get to, when you declare and initialize a variable in java, you are allocating this data, say an 8-byte float, in a particular memory cell in ...
6
votes
3answers
5k views

Finding cache block transfer time in a 3 level memory system

Following question was asked in one of entrance exams for a graduation programme. Please help me try to solve it : A computer system has an L1 cache, an L2 cache, and a main memory unity connected as ...
6
votes
1answer
102 views

How does cache partitioning prevent covert/side-channel attacks?

In a report on an open-source separation kernel (Muen kernel) I was reading, in the future work section, it says that cache coloring can be implemented to prevent covert/side-channel attacks. It is ...
6
votes
3answers
580 views

What are some "easy" unreasonable implications of O(1) time memory access?

If you are given a memory address $n$ bits long, then you need to at least process those bits. Hence, if you have $N$ memory available, addressed by $n$ bits, it would take $O(\mathbf{log}(N)) = O(n)$...
6
votes
0answers
488 views

When there's no memory, should malloc or read/write fail?

To my surprise, I recently found out that Windows would fail a large memory allocation even if little of said memory is to actually be used, e.g. even if you don't want the swap, you better not ...
5
votes
3answers
2k views

Is order of bits in byte really not of concern?

What I can't wrap my head around is sentence repeated everywhere I look, that order of bits in byte is not important(not of my, as a programmer, concern). My question then is if there is possibility ...
5
votes
5answers
569 views

Relevance of memory reads while calculating the time complexity of an algorithm

Can there be a genuine algorithm in which number of memory reads far outnumber the no. of operations performed? For example, number of memory reads scale with n^2, while no. of operations scale with ...
5
votes
1answer
555 views

How does a TLB lookup compare all keys simultaneously?

I am reading OS Concepts dinosaur book which says, "Each entry in the TLB consists of two parts: a key (or tag) and a value. When the associative memory is presented with an item, the item is compared ...
4
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3answers
5k views

How DMA improves I/O operation efficiency?

I am reading Computer Architecture & Organization by William Stallings to understand I/O operations. Stallings pretty well explains why Programmed I/O (CPU keeps checking the I/O module register ...
4
votes
2answers
630 views

Understanding non-faulting and faulting software prefetches

What is the difference between a faulting and non-faulting software prefetch. I have read some material in Google but can't understand it deeply. How do we know if a software prefetch is faulting or ...
4
votes
3answers
10k views

Row Major Vs Column Major Order: 2D arrays access in programming languages

Programmers prefer accessing a 2D array in Row-Major Order rather than Column-Major Order, Why? Are there some advantages/benefits of accessing a 2D array in row-major as compare to column-major? ...
4
votes
2answers
16k views

Cache effective access time calculation

In order to calculate the effective access time of a memory sub-system, I see some different approaches, a.k.a formulas. All are reasonable, but I don't know how they differ and what is the correct ...
3
votes
2answers
141 views

Why are primitive types stored in a stack in systems level software?

Firstly 2 disclaimers, I am very new to the concept of a stack at a low level. I've only encountered it because I'm learning rust and the docs mention it. Secondly, I am aware of another similar ...
3
votes
2answers
1k views

Insertion sort vs Merge sort - memory access

I am a computer science sophomore doing a data structures and algorithms course. My professor said that insertion sort requires random access, while merge sort does not. According to him, the ...
3
votes
2answers
3k views

Which part of the computer allocates memory in RAM?

When we declare a variable there will be a random part of memory will be allocated in RAM. Which component will allocate the memory? Is the processor or any other specific hardware doing the ...
3
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1answer
57 views

Is PREFETCH an asynchronous operation?

I often hear Prefetching as a technique for speeding up, for example, sequential memory access pattern. The prefetch should occur sufficiently far ahead in time to mitigate the latency of memory ...
3
votes
1answer
887 views

How can I calculate the effective bandwidth of a memory system?

I am currently doing my homework for my Computer Architecture class. One of the questions asks: A computer has a 64-bit data bus and 64-bit-wide memory blocks. The memory devices have an access ...
3
votes
1answer
6k views

Valid-invalid bit in a process page table

Valid-invalid bit is used to indicate whether a page in a process’s page table is valid or not. Why is it needed? Does that mean that each page table has a certain minimum size, i.e. it can ...
3
votes
1answer
55 views

What is the nature of the two bits of data held in a computer memory cell?

I hope this question doesn't offend anyone. I start off by saying that I have and always had difficulty understand the language used in computer science so I have to interpret everything into the ...
3
votes
1answer
67 views

Are all data structures in the von Neumann architecture based on the array, or array-like?

I am an old Pythonista now learning C and how various data structures and types are implemented, such as binary trees and hash tables. Learning about the latter, leads me understand that the hash ...
2
votes
2answers
910 views

where is all deleted data will go from memory system/internet? [closed]

where is all deleted data will go from a memory system ? if it is not deleting actually where it storing ? i am always wonder about this when we are sending something to a memory system it takes ...
2
votes
5answers
23k views

How to determine the maximum RAM capacity for an operating system?

I was curious to know what limits the max RAM capacity for an OS while reading about microprocessors being 32-bit and 64-bit. I know that limit for 32-bit OS is 4GB and for 64-bit OS is 16 Exabytes, ...
2
votes
2answers
2k views

Are constants faster than variables?

It's said that constant references within a program are replaced by the value at compile time, where as, variable references will need to be looked up at run time - making them slower. Yeah, it ...
2
votes
2answers
83 views

In a DBMS what are the implementation details that make set operations faster than cursors?

What are the low level implementation details that make set based operations exponentially faster than iterative processes, like cursors? At a memory level how does a set operation "touch" the data ...
2
votes
1answer
817 views

Why don't integer multiplication algorithms use lookup tables?

It seems to me that we can use lookup tables for multiplication of two integers of size $\log(n)/2$, and that the number of entries for each table of these numbers should be $O(n)$. Now, multiplying ...
2
votes
1answer
122 views

Question on "Hitting the memory wall, implications of the obvious"

I'm reading through a short paper about hitting the memory wall and I'm struggling to understand how exactly said wall will be hit. The equation for average access time is fairly simple ...
2
votes
1answer
30 views

Words in computer's memory

I don't know much about memory. Here are some lines from CLRS: The words in a computer memory are typically addressed by integers from 0 to $M - 1$, where $M$ is a suitably large integer. In many ...
2
votes
1answer
73 views

Would increasing system memory speed reduce a Von Neumann Architecture bottleneck?

A Von Neumann Architecture bottleneck is a limit on the amount of data a computer can process due to limited bandwidth between the CPU and RAM. Possible mitigations to the problem according to ...
2
votes
1answer
47 views

What are address shadows?

In my uni lecture, I am covering address decoding. I understand that memory addresses are decoded to find if they point to the RAM, ROM, or I/O, by way of the address (in the example of BBC Micro) ...
2
votes
1answer
270 views

Efficiently storing and modifying a reorderable data structure in a database

I'm trying to create a list curation web app. One thing that's important to me is being able to drag-and-drop reorder items in the list easily. At first I thought I could just store the order of each ...
2
votes
1answer
87 views

How memory controller reads from RAM with O(1) time complexity?

I am trying to understand how a RAM memory controller gets data with instant access while reading through the memory. Let's say initially, ram gets the data at address 0 and then to get the data at ...
2
votes
1answer
22 views

how does an object find the reference to its instance variables

I'm trying to understand how instance variables for a given object are stored for easy access later on. For some background, I understand that if you have a reference to an array it is very easy for ...
2
votes
1answer
101 views

Fundamental idea of this memory denial of service simulation using array copy?

I am just watching this lecture Computer Organization - Introduction And Basics where the lecturer mentions about using a simple code to demonstrate how memory denial of service can be simulated in ...
2
votes
1answer
6k views

What is M referring to when talking about memory size( 4M x 8)

In the following paragraph its talking about memory and it throws M into the L X W of memory notation and i'm confused on how 4M = 2^22. Thanks in advance PARAGRAPH: Memory is built from random ...
2
votes
3answers
766 views

How does a hard drive knows what bit is the beginning of of a byte/word?

I'm guessing I could replace the words "hard drive" with "random access medium" but let's be more specific here. Also for the sake of this question, let's not consider SSDs. Just plain old hard-drives ...
2
votes
2answers
471 views

Bytes and bits conversion?

It is claimed in my textbook that In a 32-bit system, The instruction LDR r4,[r6] lets you address a logical space of 4GB. I know where the 4GB comes from, It is simply 2^32 / (1024 x 1024 x ...
2
votes
2answers
48 views

Can the same machine word sometimes be data and sometimes be code?

I have a question about machine words. We have data and a code segment in the memory which is addressed. If we take a word from it and let's say it is a code (instruction), and another one is some ...
2
votes
1answer
215 views

Does weak consistency allow reordering of events?

I am on studying a consistency model: weak consistency. weak consistency This model was first defined by Dubois et al. (1986), by saying that it has three properties: Accesses to synchronization ...
2
votes
1answer
630 views

What is an addressable cell size?

This question started with a quiz question from my university: Consider a big-endian computer system with an addressable cell size of one byte. The values in memory cells 372 to 375 are shown in the ...
2
votes
1answer
899 views

What happens if the associativity level is greater than the cache size?

I am working on a computer organization caching problem The Problem: What happens if the associativity level is greater than the cache size? I know that associativity level is how many blocks are ...
2
votes
1answer
3k views

Byte addressable vs Word addressable

I am trying to understand the difference between byte addressing and word addressing. A 4-way set-associative cache memory unit with a capacity of 16 KB is built using a block size of 8 words. The ...
2
votes
1answer
1k views

How to find percentage of CPU time consumed during DMA operation?

Q) Consider 1MBps hard-disk is interfaced to the processor in a cycle stealing mode of DMA whenever $64$ bytes of data is available in the buffer,then it is transferred to main memory (1 word = 64 ...
2
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0answers
6k views

Solving for Hit Ratio of a Theoretical Memory System

Long time lurker, first time poster. The book I am reading is William Stalling's "Operating Systems: Internals and Design Principles" Seventh Edition. Stalling's definition of hit ratio according to ...