Questions tagged [memory-hardware]

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32
votes
8answers
15k views

How does a computer determine the data type of a byte?

For example, if the computer has 10111100 stored on one particular byte of RAM, how does the computer know to interpret this byte as an integer, ASCII character, or ...
28
votes
3answers
8k views

Why is the Nintendo Entertainment System (NES) referred to as an 8-bit system, rather than a 1-byte system?

As far as I've understood it, referring to this system as an 8-bit system points out that one can access 8 bits of data in one instruction. While I understand that we're not saving vast amounts of ...
18
votes
7answers
7k views

Is a computer without RAM, but with a disk, equivalent to one with RAM?

Memory is used for many things, as I understand. It serves as a disk-cache, and contains the programs' instructions, and their stack & heap. Here's a thought experiment. If one doesn't care about ...
18
votes
3answers
652 views

Parallelising random reads seems to work well — why?

Consider the following very simple computer program: for i = 1 to n: y[i] = x[p[i]] Here $x$ and $y$ are $n$-element arrays of bytes, and $p$ is an $n$-...
10
votes
1answer
1k views

Writing a multitasking operating system for a processor without MMU

I've been thinking of writing a hobby operating system for some of the ARM processors. There are many popular single-board computers with ARM MPU, so I simply wanted to purchase one of those (choosing ...
9
votes
1answer
3k views

What is oblivious RAM and how does it work?

Could anybody explain me what exactly oblivious RAM is? I found the following explanation which makes it kind of clear to me, but I would like to get a sense of the technical aspects: Encryption ...
5
votes
2answers
378 views

How do computers compute?

This is a kind of follow-up to a question I asked on superuser, where I asked for the definitions of a 'distinghuisable state' and a 'memory cell'. My questions where properly answered, but I was ...
5
votes
2answers
936 views

Variable size and CPU performance

When you learn programming they tell you choose data types that suffice for the concepts you're expressing, i.e. not too small because then your data won't fit and not too big because you don't want ...
5
votes
2answers
760 views

Why is word-addressable the exception, not the rule?

As stated on Wikipedia: Most modern computers are byte-addressable instead of word-addressable. Why is this case? Since the CPU processes words (of predominantly 64 bits or 8 bytes) now, wouldn't ...
5
votes
1answer
75 views

How does cache partitioning prevent covert/side-channel attacks?

In a report on an open-source separation kernel (Muen kernel) I was reading, in the future work section, it says that cache coloring can be implemented to prevent covert/side-channel attacks. It is ...
5
votes
2answers
5k views

Advantage of byte addressable memory over word addressable memory

What is the reason that almost all computers (besides some DSPs) use byte addressable memory? With byte addressable memory and a 32 bit address you can have 4GB while with word addressable memory you ...
5
votes
1answer
485 views

Why is memory one dimensional?

Addresses in system programming languages like C are one dimensional (i.e. one number). This forces the programmer to make a decision whether matrices are stored "row major" or "column major" causing ...
4
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8answers
7k views

Who converts binary/machine code to electrical signals and how?

I went through lots of blogs and posts but could not exactly figure out how the machine code is converted to electrical signals? Any software program is compiled to machine code which is nothing but ...
4
votes
0answers
199 views

What's the current cost of SRAM? [closed]

I'm teaching Architecture this semester, and I'm using Computer Organization and Design (Patterson & Hennessy) as the text. The book contains a table that has the typical access time and cost of ...
3
votes
2answers
312 views

Representation of used space and free space in hard drives

I've read from this How data is physically stored in hard drives, that the North/South orientation of the magnetic medium represents data as 0 or 1 physically in the hard drive. Data is stored in ...
3
votes
3answers
5k views

How DMA improves I/O operation efficiency?

I am reading Computer Architecture & Organization by William Stallings to understand I/O operations. Stallings pretty well explains why Programmed I/O (CPU keeps checking the I/O module register ...
3
votes
2answers
15k views

What is the maximum directly adddressable memory capacity?

This is taken from OPERATING SYSTEMS: INTERNALS AND DESIGN PRINCIPLES by WILLIAM STALLINGS Consider a 32-bit microprocessor composed of 2 fields: the first byte contains the opcode and remainder an ...
3
votes
4answers
4k views

Why do Computers use Hex Number System at assembly language?

Why do computer use Hex Number System at assembly language? Why don't they use any other number system like binary, octal, decimal? What thing forced computer designer to use hex system at assembly? ...
3
votes
3answers
2k views

Difference between RAM and buffer

I have searched but didn't get any exact difference between RAM and a buffer. If both are used for temporary storage, then why they are named differently while both having same property?
3
votes
1answer
262 views

Why we need EEPROM in this micro-controller

PIC16F887 Block Diagram According to the block diagram above, since we already have Program Memory, which may be used to store our program, why should we still need EEPROM? What is it for?
3
votes
1answer
938 views

What is this trapezoid-shaped logic component?

This is from http://www.cis.upenn.edu/~milom/cse240-Fall05/handouts/Ch05.pdf , slide 9. From this diagram, I recognize 0001 as the opcode, which corresponds to the ADD instruction. I recognize 011, ...
3
votes
2answers
2k views

Which part of the computer allocates memory in RAM?

When we declare a variable there will be a random part of memory will be allocated in RAM. Which component will allocate the memory? Is the processor or any other specific hardware doing the ...
3
votes
1answer
538 views

How does hardware interrupt work on a physical layer

I'm a newbie in computer science and would to understand how hardware interrupts work at the physical layer. I ask my question considering a specific example. When packet arrives at the network ...
3
votes
1answer
66 views

Can bar codes theoretically be considered a type of digital memory?

Bar codes act just like any other device that contains data that you can read from. Can bar codes thus be considered a type of computer memory? I believe the principle is quite similar to the optical ...
3
votes
1answer
740 views

How can I calculate the effective bandwidth of a memory system?

I am currently doing my homework for my Computer Architecture class. One of the questions asks: A computer has a 64-bit data bus and 64-bit-wide memory blocks. The memory devices have an access ...
3
votes
0answers
79 views

References on memory subsystems

I took a typical computer architecture class a long time ago as an undergrad and since then I've done a fair amount of low-level systems programming down to the assembly level and worked on OS kernels....
2
votes
6answers
2k views

How can a CPU access more memory locations than 2^wordsize?

I noticed that CPU's like the 8086 and especially the 8080 have the ability to access more memory than what one would normally assume. The 8080, for example, has an 8-bit word size but can use a 16-...
2
votes
2answers
8k views

How is data written to RAM

From my understanding(correct me if I am wrong) when I read data from RAM memory it is copied into processor cache and than it is copied into register to be used by the processor. When I create data (...
2
votes
3answers
539 views

Is a supercomputer more powerful than the total of all the world's computers in 2004?

The supercomputer I am researching has 2.2 petaflops and boasts total memory of 1000 terabytes and disk space of 23.5 petabytes. Is this more computing power than the total of the entire worlds ...
2
votes
2answers
787 views

where is all deleted data will go from memory system/internet? [closed]

where is all deleted data will go from a memory system ? if it is not deleting actually where it storing ? i am always wonder about this when we are sending something to a memory system it takes ...
2
votes
3answers
1k views

Why do we still use a Von Neumann Architecture in modern computers?

The Von Neumann architecture was first created in the mid 40s for use in a computing system known as ENIAC for research into the feasibility of thermonuclear weapons. To this day the Von Neumann ...
2
votes
1answer
3k views

Relationship between RAM size and 32-bit vs 64-bit word size

I know that x86 supports only 4GB of RAM, and that switching to x64 greatly increases the size of RAM you can use, but I don't understand why. Why is the maximum supported ram size related to whether ...
2
votes
1answer
192 views

Why is 2^32 in a 32-bit system = 4GiB and not 4Gib?

I was watching this video 32-Bit vs 64-Bit - The Advantage and at 1:19 (timestamp) the narrator mentioned the 4GB memory allocation for the 32-bit system. I later found out it should've been 4GiB but ...
2
votes
1answer
34 views

How does a dual core microprocessors run so many programs?

I have a laptop with Intel dual core and it runs, the OS windows, and many application from Opera, age of empires, word, excel etc open at once just fine. If it only has 2 cores, how can so many ...
2
votes
3answers
143 views

Are hardware specs relevant in software performance comparisons?

I notice occasionally in blogs or articles comparing different languages, algorithms, etc. that the author will divulge info about the processor used in the testing. Is this meaningful? Shouldn't ...
2
votes
2answers
295 views

Spatial Locality in Cache - Which addresses are loaded?

I don't quite understand the concept of spatial locality in cacheing. I understand that on a cache miss, not only the specific address we want is loaded into the cache, but also "nearby addresses" are ...
2
votes
1answer
352 views

Computer Architecture-3 level RAM hierarchy

In all computer architecture books we study that Cache memory could be divided into 3 levels (L1,L2 and L3) and its very beneficial to do so. Why don't we use the same approach in case of main memory (...
2
votes
1answer
91 views

How does a register remember value?

So I am studying this great book, and Chapter $3.1$ is about registers. Quoting from this book / chapter: A register is a storage device that can "store" or "remember" a value over time, ...
2
votes
2answers
2k views

Why is data fragmentation not possible on main memory (RAM)?

I am wondering why data fragmentation is a problem on main memory. On a software level, virtual addresses are used anyway. So why can one address space not be split up into multiple segments, like a ...
2
votes
3answers
642 views

How can i compute tag-index-displacement bits of an address if cache size is not a power of two?

How can i compute tag-index-displacement bits from an address if cache size is not a power of two? Intuitively, i would be inclined to think that i can not directly indicate which bits of the address ...
2
votes
2answers
46 views

Is all data stored in computers stored as machine code?

I know that the most basic (and least abstract) code for programming is machine code (with binary of 0s and 1s being the typical ...
2
votes
1answer
62 views

How memory controller reads from RAM with O(1) time complexity?

I am trying to understand how a RAM memory controller gets data with instant access while reading through the memory. Let's say initially, ram gets the data at address 0 and then to get the data at ...
2
votes
1answer
126 views

Is it reasonable to model row buffers in DRAM corresponding to the same bank ID as one big row buffer?

I'm creating a simple row buffer simulator to go along with a simple cache simulator in order to count hits and misses in the row buffer. Whenever a cache block isn't in the cache I want to go look ...
2
votes
2answers
70 views

Caches and reading a PDF

I am currently learning about caches in Systems class, and I had a few doubts about what exactly happens when a Computer reads a PDF. This is the sequence that happens in my mind: The CPU checks if ...
2
votes
1answer
918 views

What if block sizes are not equal among caches?

In all the books, packets of slides and similar I read, cache miss is always explained by assuming that blocks of different caches (or cache and RAM) are always of the same size. It's pretty clear how ...
2
votes
3answers
491 views

How does a hard drive knows what bit is the beginning of of a byte/word?

I'm guessing I could replace the words "hard drive" with "random access medium" but let's be more specific here. Also for the sake of this question, let's not consider SSDs. Just plain old hard-drives ...
2
votes
1answer
1k views

Back invalidation to maintain inclusion in inclusive cache

For an L2 cache that is strictly inclusive of the L1 cache, if a block to be evicted is also present in L1, then back invalidation is required to maintain the inclusion property. I am interested in ...
2
votes
1answer
180 views

Why do servers use ECC memory? [closed]

I understand that ECC checks for errors and corrects them automatically without the knowledge of the operating system or user. I don't understand however why servers often use ECC memory?
2
votes
1answer
173 views

What is the basic idea behind the usage of TLBs?

I know how Translation Lookaside Buffers work, and i also know we use them to improve the performance of data/program access by storing the recent page numbers - frame numbers in a memory cache. The ...
2
votes
1answer
816 views

Where do these DRAM row/column calculations come from?

Let r be the number of rows in a DRAM array, and c be the number of columns. Apparently, DRAM with organization 16x1 requires least pins when r = c = 4 because fewer address bits are required to ...