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Questions tagged [shared-memory]

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'if' and 'while' statements within a SIMD architecture and its memory architecture

I am doing some past exam papers and I found two interesting questions which I cannot answer due to them not being extensively covered in the lecture notes given to me by my lecturer. The questions ...
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1answer
440 views

Conway's Game Of Life Problem Parallel (OpenMP)

I am currently working in solving Conway's Game Of Life problem for a Parallel and Distributed Computing course. The problem is a little bit different form the original, in the sense that instead of ...
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151 views

Processor consistency and cache coherence

Consider this example from Wikipedia: ...
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65 views

Write-To-Read Relaxation in Cache Consistency

Write-to-Read Relaxation means that for a processor: later reads can bypass earlier writes But what does that mean? What exactly is the difference between a read and a write for a Cache? An ...
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Wikipedia on MVCC

I read about Multiversion Concurrency Control in Wikipedia. They say that every piece of data in DB has a Read Time Stamp (RTS) and If transaction Ti wants to Write to object P, and there is also ...
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1answer
306 views

Effect of Copy-On-Write on 2 processes sharing address space

I am studying operating systems and was going through Copy On Write mechanism. From Wiki: When one process modifies the memory, the operating system's kernel intercepts the operation and copies ...
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1answer
1k views

Why is quiescent consistency compositional, but sequential consistency is not

I'm having trouble in comparing these two memory consistency models. Essentially for sequential consistency I think of real code like this: ...
4
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1answer
707 views

Difference between SRSW and MRSW safe Boolean registers

I'm reading The Art of Multiprocessor Programming and am currently trying to understand Chapter 4 — The Foundations of Shared Memory. In section 4.2 it is shown how to build a multi-reader, single-...
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2answers
541 views

where is all deleted data will go from memory system/internet? [closed]

where is all deleted data will go from a memory system ? if it is not deleting actually where it storing ? i am always wonder about this when we are sending something to a memory system it takes ...
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62 views

Extending the causal memory model to wide-area distributed storage systems

In the seminal paper "Causal memory: definitions, implementations, and programming", distributed causal memory is defined to ensures that all the processes in a system agree on the relative ordering ...
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1answer
14k views

Memory Consistency vs Cache Coherence

Is it true that Sequential Consistency is a stronger property than Cache Coherence? According to Sorin, Daniel J; Hill, Mark D; Wood, David A: A Primer on Memory Consistency and Cache Coherence, ...
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1answer
472 views

Why can L3 caches hold only shared blocks?

In a recent CACM article [1], the authors present a way to improve scalability of shared and coherent caches. The core ingredient is assuming the caches are inclusive, that is higher-level caches (e....
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1answer
284 views

termination of two concurrent threads with shared variables

We're in a shared memory concurrency model where all reads and writes to integer variables are atomic. do: $S_1$ ...