Questions tagged [virtual-memory]

Questions about techniques for providing the appearance of an isolated, contiguous address space to each process. The size of the address spaces may be made to appear larger than the size of main memory by moving pages or segments between main memory and a larger backing store.

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Timesharing and the MMU

Imagine we are running a program on a modern operating system, such as Linux or Windows. After running for some time, the program's time slice is up. A different program (process) starts to run again. ...
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Minimum Page Table Size for Process?

I was learning about Page Table and Virtual Memory, My professor showed the following image: and asked what's the minimum size for the page table where L1=L2=256 I answered it's 256 since L1 is ...
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Is possible applying virtual memory with cloud disk (cloud storage) instead of local disk (SSD/HDD)?

I heard concept of virtual memory is using disk to save temporary progress or data instruction (temporary data). About temporary data, it's main job of physical memory (RAM) so that's mean virtual ...
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What is the reason for this contradiction about the size of the char type?

the size of one char in C is 4 bytes, however to define an 'A' character we use the sum of two values like this expression here: or in other way i want to say that the char is 4 bytes size, but in ...
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How is segmentation a solution to external fragmentation

As per Galvin's book, segmentation is the solution to external fragmentation. But in segmentation, the memory blocks are of different sizes. So, if one segment is removed that creates a hole. If we ...
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How could a page be invalid in demand paging?

I was reflecting on what I learned about demand paging and I have a question: In demand paging, we have entries in the page table only for frames that are present in physical memory. So I was ...
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491 views

Why does page size affect page table size?

I am revising operating systems theory (I'm Italian, forgive me for bad English) and there is a slide that states: If page size is small then we avoid internal fragmentation (I get that) but we have ...
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107 views

Understanding how internal fragmentation occurs in systems using only paging with huge page size

The excerpt below is from the OS text by Galvin et. al. When we use a paging scheme, we have no external fragmentation: any free frame can be allocated to a process that needs it. However, we may ...
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How LRU is used without special hardware?

I had been curious as to which page replacement algorithm is used in OSes like Windows and Linux. I could find that most information on the internet pointed at LRU(Least Recently Used) Algorithm. But ...
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Are pages moved to the disk when the process is scheduled?

When process A has run long enough and the scheduler decides to run process B, will all the pages of process A be moved to the disk or they remain in the main memory?
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Are the number of entries in the TLB(Translation Lookaside Buffer) limited?

If not, then why aren't all the pages loaded into the TLB so that TLB misses never happen.
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Where are process pages stored - in the swap space or under file system? Can demand paging work without space space?

The Galvin OS text says that on older systems, there used to be a method, where the entire running process (when in idle state) was moved from the main memory (when main memory ran low) to the disk ...
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How to determine memory allocation for single level table

I received this problem on my study guide but I have no idea if I'm doing it correctly: How much space needs to be allocated for a single-level page table for a machine with a 32 bit virtual memory ...
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Virtual Memory - Calculating Page Table Size and Other Attributes

Im struggling to understand the answer to a question: Consider a system with 2MiB physical memory and 4GiB virtual memory. Page size is 4KiB. If we choose to store seven information bits in each PTE, ...
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The memory a page table occupies and finding the # of pages within it

Was doing some practice and saw this question: Assume we’re working on a machine which has the following parameters: • 16GiB of physical memory • 22 bit virtual addresses • 128B pages • Each PTE in ...
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How could one construct a TLB so that not all the bits of the presented address need match to result in a hit?

I was wondering besides the typical matching of all bits in the presented address to the resulting page, is there another way of doing so? what are the benefits/ cons and how would one go about doing ...
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Find offset and page number given paged virtual memory address

I ran into this question in class: Assume a machine that is 64-bit and has 8GB memory. They use a paged virtual memory where the page size is 4KB. You run the following program: ...
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Calculating physical address from Logical Address

I have been give a page table logical address of 0011 0110 1010 1010 and have been told that there are 512 entries into this page table in which the frame number is two times smaller that the page ...
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261 views

How do I calculate offset from virtual address?

If the page size is 4Kbyte and the physical size of the main memory is 32Kbyte. Now if I consider virtual address of 37064.. The page number is then 37064/4096 = 9 And according to my diagram page 9 ...
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71 views

Number of hardware page tables and page directories kept in the MMU

How many hardware page tables (physical) and page directories are kept in the memory management unit? If a cpu has a 32 bit virtual address, the upper 10 bits are used for the page directory, the ...
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Is logical to physical address conversion inclusive?

If I am trying to translate a logical address of page N and offset O, and my translation unit tells me the translation has a base address of B and a length of L, is the length L inclusive or will it ...
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58 views

Segmented address / normal virtual address

In a cpu with segmented memory, can an address only be accessed with a segmented address, or can a normal virtual address also be used?
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How are programs split up into pages in Memory Paging?

I am a bit confused about how the logical addresses are generated in a paging memory architecture and where and when a program is split up into pages. I understand how logical addresses are translated ...
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Functionning of the eviction set for Prime and Probe

I have to write a report about Prime and Probe, more specifically about its eviction set method, and there are two notions that remain blurry for me : To find the set, we use huge pages like it's ...
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37 views

can virtual address map any on virtual memory on disk?

I was reading a textbook which says that: If the valid bit is set, the address field indicates the start of the corresponding physical page in DRAM where the virtual page is cached. If the valid bit ...
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41 views

How does virtual memory work when it need to save data in physical memory into disk?

I'm reading a textbook which desribe VM as: a data structure stored in physical memory known as a page table that maps virtual pages to physical pages. The address translation hardware reads the page ...
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How does the OS handle multiple stacks in its physical memory?

Without assuming ASLR... Processes have virtual addresses, and they manage stacks & heaps of their own. However, these all get mapped to physical addresses somewhere on the memory. Let's say we ...
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Virtual Memory vs Cache for block identification

Both are based on the principle of locality. Then why virtual memory uses table lookup while cache memory uses associative memory for block identification?
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Source code or detailed explanation of "WKS" virtual memory compression algorithm?

I've been trying to find information on various program data virtual memory compression algorithms that are in the "WK" family of algorithms. So far, I've been successful with the "WKdm" compression ...
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204 views

Is physical pages zeroed out before it's mapped to a virtual page?

I don't how this works. According to me if the physical memory is not cleared then there is some security risk as there may be some sensitive information in it from the other processes. How does the ...
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576 views

Determine page number and offsets for address references

I'm working on learning operating systems and I've come across a strange question that I don't know how to answer. The question is: Assuming a 1-KB page size, what are the page numbers and offsets ...
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612 views

What does this mean: "The compile-time and load-time address-binding methods generate identical logical and physical addresses"?

I read this in my Operating System textbook. Does it mean that the logical addresses generated by compile-time binding scheme are the same as the logical addresses generated by load-time binding? Or ...
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Doubt in effective memory access time in case of n level paging + TLB

I am getting confused with calculation of EEMAT(Effective memory access time). I decided to close the book and think on my own and make an equation. Please see whther this is correct or not. I thought ...
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125 views

Paging - access less than a page of memory

I'm having a bit of trouble understanding how less than a page of memory can be used. From what I understand, memory is given out in page size chunks - say pages are 4096 bytes, and 4 bytes are ...
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153 views

Distinction between paging and segmentation?

In my operating systems textbook, there is a paragraph which states: As for the contents of each PTE, we have a number of different bits in there worth understanding at some level. A valid bit is ...
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What are the differences between embedded processor and non-embedded processor?

I read a statement which says Almost all non-embedded processors, and many embedded processors, support virtual memory Anyone who can explain the difference between both types
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Understanding memory mapping conceptually

I've already read several blogs and questions on stack exchange, but I'm unable to grasp what the real drawbacks of memory mapped files are. I see the following are frequently listed: You can't ...
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Software management of TLB misses?

I'm reading an OS textbook and it was talking about TLB misses being handled by software. I'm very new to all this by the way. So there's a context switch to some kernel procedure. But surely in this ...
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How are logical addresses of instruction operands mapped to physical addresses?

Is address translation for all operands in single instruction done only once and then are all operands fetched continuously? For example, consider any dummy instruction ...
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53 views

Slowdown when accessing data at page boundaries?

Hi I have a program which accesses memory words that are located X bytes apart in virtual address space. For instance, ...
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527 views

Understanding paging and internal fragmentation

I am currently studing questions but stuck on this one, I hope someone can help me out to understand. Question: Assume that we have a paged virtual memory with a page size of 4Ki byte. Assume that ...
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Do the "virtual memory"s mentioned in the 2 articles refer to different things?

I've read the following 2 articles explaining the difference between virtual memory and physical memory. One thing that I found ...
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Virtual address translation

I'm in an OS class now. I've been wrestling this problem for a while and can't convince myself of a solution. My professor is very busy and hasn't made time to help. Also, this question is from an ...
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Machine code: How can an OS prevent user-level programs from accessing each other's memory? [duplicate]

Okay, I’ve done a lot of research on this, but I can’t seem to wrap my head around it. Essentially, the question is as follows: How can an operating system prevent a machine instruction from a user-...
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564 views

Memory Mapping Segment

I read that "Memory Mapping Segment"/"memory mapped file" is a segment of the virtual memory of a process, where a file or file-like Ressource is loaded into. It is for high performance file I/O. I ...
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112 views

address spaces of changing processes

I read that the mapping for user-space processes is changed after each process switch. By mapping I mean the translation from virtual addresses to "real" memory address. I thought that processes are ...
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What does it mean " The outer level page table need not be page aligned?

The question is in context to multilevel page table. I was trying to solve numerical on multi-level paging and noticed that page size might not be same at all levels. I came across the point "Outer ...
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ARM STM instruction: page fault problem with MMIO

The ARM STM instruction is described here in the ARM manual. This instruction writes all or a subset of registers at memory locations starting from a base memory ...
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72 views

jump to MMIO address

In the ARM architecture, what happens on executing a jump instruction whose jump target address is an MMIO address (or in paging mode, a virtual address that is mapped to an MMIO address)? Would this ...
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pool of free page frames OS

I read that in a paging scheme memory management, some os's have a paging daemon that wakes up periodically to inspect the memory of the RAM. This is to ensure that modified pages can be scheduled to ...