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Questions tagged [virtual-memory]

Questions about techniques for providing the appearance of an isolated, contiguous address space to each process. The size of the address spaces may be made to appear larger than the size of main memory by moving pages or segments between main memory and a larger backing store.

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Memory Mapping Segment

I read that "Memory Mapping Segment"/"memory mapped file" is a segment of the virtual memory of a process, where a file or file-like Ressource is loaded into. It is for high performance file I/O. I ...
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1answer
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address spaces of changing processes

I read that the mapping for user-space processes is changed after each process switch. By mapping I mean the translation from virtual addresses to "real" memory address. I thought that processes are ...
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1answer
19 views

What does it mean " The outer level page table need not be page aligned?

The question is in context to multilevel page table. I was trying to solve numerical on multi-level paging and noticed that page size might not be same at all levels. I came across the point "Outer ...
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1answer
21 views

ARM STM instruction: page fault problem with MMIO

The ARM STM instruction is described here in the ARM manual. This instruction writes all or a subset of registers at memory locations starting from a base memory ...
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1answer
26 views

jump to MMIO address

In the ARM architecture, what happens on executing a jump instruction whose jump target address is an MMIO address (or in paging mode, a virtual address that is mapped to an MMIO address)? Would this ...
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pool of free page frames OS

I read that in a paging scheme memory management, some os's have a paging daemon that wakes up periodically to inspect the memory of the RAM. This is to ensure that modified pages can be scheduled to ...
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0answers
78 views

Effective Instruction Execution Time with TLB and page Fault

Consider a system with a two-level paging scheme in which a regular memory access takes 150 nanoseconds, and servicing a page fault takes 8 milliseconds. An average instruction takes 100 nanoseconds ...
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1answer
29 views

How can a user process even try to access a memory location its not allowed to when it doesn't have access to page table?

So is it even possible for a user process to even try to access a physical memory location that does not belong to it and therefore getting an error by operating system? because for example with a 32 ...
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1answer
249 views

How pictures and videos are usually loaded in Memory? [closed]

Lets assume I'm talking about Jpeg and Mp4 and a general video player(not sure if different ones load it differently, if they do please tell) So do video players (process) usually load the entire ...
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1answer
64 views

How earliest that the data TLB (Translation Lookaside Buffer) can be accessed in an instruction execution pipeline?

In an instruction execution pipeline, the earliest that the data TLB (Translation Lookaside Buffer) can be accessed is: List item before effective address calculation has started during effective ...
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241 views

calculate logical address and physical address by using page table with invalid and valid bit

I have an exercise which is unclear to me. The exercise is about paging(operating system). Exercise is: e. Translate into physical addresses the one(s) which are both legal and in memory. f. What ...
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1answer
58 views

why do we run out of heap space even if we have virtual memory?

Whenever we try to get space in heap(using malloc or new) we can get out of heap space error if it exceeds the limit. But, we have virtual memory so why can't OS allocate that much space and then do ...
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1answer
36 views

Transform calculation to memory

Theoretically, is it possible to convert the processing power of the CPU into several tens of bits of memory? My question is unusual, but it's very interesting. I'm looking for a way to create a ...
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1answer
60 views

Valid bit incoherence between TLB and Page Table

In the fourth row of the TLB the valid bit is 0. The corresponding row in the pagle table (fifht row) has the valid bit 1. How is this possible? What events leads to this incoherence?
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1answer
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Linux OS/HW VM cooperation

From what i've learned, the HW is responsible for setting the accessed and dirty bits in the PTE of a process, and the OS is responsible for turning them off. My question is why? The first part, i ...
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1answer
35 views

Virutalization of peripheral device

I have this question to answer: "Please shortly explain how an interface virtualizes a peripheral device to the CPU." I don't really understand what the question is asking for. I know the theory ...
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2answers
141 views

Does the Working Set Paging Algorithm use a separate page table?

I am doing research on paging algorithms. While learning about the working set algorithm from several scientific sources I was not really able to figure out where exactly the working set is defined or ...
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Working out logical address space

If I have 2^32 bytes (512 MB) of physical memory, and we assume that each page is 2^10 bytes, how would I work out what the physical and logical address space would be? No explanation that I can find ...
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1answer
288 views

Definitions of: virtual address space, page size

(I can't seem to find actual definitions of these terms anywhere, only hints and guesses). Is it fair to say, that: Virtual address space is the amount of bytes that can fit into RAM cells of all ...
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2answers
61 views

How does the processing happen in a CPU when it uses Virtual Memory?

I am just trying to visualize how computers work with Virtual Memory/Address. Assume there is a program on the disk that looks like this: ...
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1answer
46 views

What's a bank memory?

I've search on Google but still don't understand. I've read about it into arm book, but they don't define it. Could you explain me what is it, where is it used, what's the point to have it and, if ...
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36 views

TLB failure in a memory access

I have come across a question which says If there is a TLB failure in a memory access, the disk must be accessed to load a new page into main memory. The answer is NO, but i dont understand why. Is ...
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1answer
51 views

Process address space separation in L1 cache of Intel hyperthreaded CPUs

Since a processing core with hyperthreading enabled is presented as two or more cores to the operating system, it can run completely different processes with different, isolated virtual memory spaces. ...
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2answers
44 views

What is the difference between a page and thread?

"Each process that is executed is divided into blocks of same size, called pages." "Thread is a part of process being executed." Are pages and threads both part(s) of process? Whats the difference ...
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1answer
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How does a buffer overrun corrupt the return address?

I got stuck on the following note while reading a paper about computer security: The stack mixes program data and control data – by overrunning buffers on the stack we can corrupt the return ...
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1answer
90 views

Virtual Memory: “Page Table or Page Tables?”

I am having a bit of a tough time grasping whether a computer system contains several page tables or just one page table. Some sources speak of page tables in plural others in singular. ...
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1answer
44 views

How does the OS detect B&B violation from hardware?

After reading about Base & Bounds memory protection mechanism from Stanford CS140 lecture notes, I understood from the explanation below that there is an ...
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1answer
2k views

What does 'relocation' mean?

I am reading about Base & Bounds memory protection mechanism, and I noticed the use of the term 'relocation' in the context of ...
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2answers
536 views

Does MMU contain and manage CPU caches?

I read about Virtual Memory in various CS references, however I'm still not sure whether CPU caches such as TLB, L1 and L2 are ...
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1answer
315 views

Where are 'Base & Bounds' registers located?

I read about virtual memory from L08/CS152 of U.C Berkeley and used to deep dive into the details of VM hardware implementation, yet didn't find any document or figure on the course specifying where ...
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1answer
5k views

Explain Hashed page tables in operating system

I have a difficult time understanding hashed page tables used in virtual memory management. Here is picture of the slide that I am referring to: I understand that p is hashed and then the hash is ...
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1answer
306 views

Virtual Memory - Non-contiguous Memory Allocation

I'm studying for my operating systems final, and one question that my professor asked that I can't seem to find the answer to is the following: "Why does virtual memory use non-contiguous memory ...
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1answer
3k views

If the virtual address space can be larger than the physical address space, how are the address mappings stored in memory?

Let's say we are working with a system that has 40 physical address bits. The total physical address space (assuming byte-addressable memory) is $2^{40}$ bytes, or 1 TiB. And if virtual addresses are ...
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2answers
38 views

If you increase the address space for an OS, does the Phys Mem used by the program increase?

I am learning about the OS. I know: that Address Space Size = # of pages x page size So if I increase Address Space Size, then the number of pages increases:(not the page size). However, isn't the ...
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1answer
84 views

RAM and the degrees of freedom

This question is about computation/computational physics. Imagine that you want to solve $10^6$ equations of motion, and you have $10^6$ degrees of freedom (position of the particle). How many RAM ...
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1answer
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Is the term page replacement actually a misnomer?

My understanding is that "page replacement" entails replacing the contents of a frame to bring in a new frame in it's place corresponding to a new page. Since it is not the page, but the frame that ...
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66 views

What happens when accessing 0x00ABBA?

Given the following page table with a 24 Bit virtual address and 4KB page size and 4 byte long entries (%X means hexadecimal values): I don't understand how to translate e.g. address %X00ABBA here. I ...
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5answers
209 views

Is Virtual Memory unreliable?

I have a question regarding multilevel page tables. As far as I know, in most 64 bit systems only 48 bits are used in page tables which would allow for 256TB of virtual memory to be addressed. For ...
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1answer
619 views

How does malloc(sizeof(char)) work [closed]

AFAIK, malloc(sizeof(char)) is intended to allocate a 1-byte block of VM and strcpy requires that the destination string dest must be large enough to receive the copy That means theorically that ...
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1answer
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logical to physical addressing

Consider the page table below (all numbers are in hex) and assume 1 KB page size. Assume 16-bit logical address and 20-bit physical address. a.What are the page numbers and offsets for the following ...
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1answer
4k views

How to calculate page size of virtual memory

im new at OS and I want to know how to calculate the page size of this virtual memory system? Information: Physical Memory - 32 KB Virtual Address - 16 bit Offset - 12 bits Current ...
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Paging: Does the page table of a process also gets swapped out when the process gets swapped out from main memory?

Does a process's page table too gets swapped out to secondary storage from main memory when the process gets swapped out to secondary storage from main memory? And gets swapped back in when the ...
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2answers
107 views

I need help with virtual memory problem

• Given the above virtual to physical address mapping, 1 What is the page size? 2 How many virtual pages can we have in maximum? 3 How many physical pages can we have in maximum? Approach: 1 For ...
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1answer
4k views

How many bits for offset/frame/page

I'm working on the following exercise and can't get the calculations right: Assume an OS uses: 33 bits for physical address 34 bits for logical address 2KB frame size Calculate: How many bits are ...
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0answers
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Isn't resident set management superfluous?

My question is in the context of a paging virtual memory system. THE PREMISES: The function of resident set management (RSM) is to: Impose an upper bound on the cardinality of a process' resident ...
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49 views

Can the cache always miss while trying to write to the cache?

According to the lecture, a virtual address first goes to the TLB. If the TLB hits, it is then checked, if something has to be either read or written from cache. In case of writing, it is then ...
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1answer
522 views

Representing non-contiguous memory regions as a standard vector with O(1) access

What interesting alternatives are there for constructing an arbitrarily large static array from smaller scattered blocks of fixed-sized non-contiguous blocks of memory? This is similar to the ...
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2answers
708 views

Question on Virtual memory and Physical memory

This is the question where I'm stuck: With a 32-bit virtual address, 4 KB pages(12 offset bits), and 4 bytes per page table entry, we can compute the total page table size: Number of page table ...
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2answers
356 views

Understanding non-faulting and faulting software prefetches

What is the difference between a faulting and non-faulting software prefetch. I have read some material in Google but can't understand it deeply. How do we know if a software prefetch is faulting or ...
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1answer
50 views

Why not space out memory allocations?

In ext4 file system, the files are spaced out as far apart as reasonably possible to allow for efficient reallocation. Why do we not do this in memory? Why not allocate one memory as page 20, and the ...