# Tag Info

106

Addition is fast because CPU designers have put in the circuitry needed to make it fast. It does take significantly more gates than bitwise operations, but it is frequent enough that CPU designers have judged it to be worth it. See https://en.wikipedia.org/wiki/Adder_(electronics). Both can be made fast enough to execute within a single CPU cycle. They'...

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There are several aspects. The relative cost of a bitwise operation and an addition. A naive adder will have a gate-depth which depend linearly of the width of the word. There are alternative approaches, more costly in terms of gates, which reduce the depth (IIRC the depth then depend logarithmically of the width of the word). Others have given ...

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CPUs operate in cycles. At each cycle, something happens. Usually, an instruction takes more cycles to execute, but multiple instructions are executed at the same time, in different states. For example, a simple processor might have 3 steps for each instruction: fetch, execute and store. At any time, 3 instructions are being processed: one is being fetched, ...

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The point about circuits is that a circuit has a fixed number of inputs. This means that, to define a language, we need a family of circuits $C_0, C_1, C_2, \dots$ such that the circuit $C_i$ tells you which strings of length $i$ are in the language, for each $i$. This doesn't require that there should be any relationship between the circuits $... 14 Any computable boolean function with a fixed-length input can be computed by an arithmetic circuit. Consider any boolean function$f:\{0,1\}^n \to \{0,1\}$. Then there exists a multivariate polynomial$p(x_1,\dots,x_n)$such that$f(x_1,\dots,x_n) = p(x_1,\dots,x_n)$for all$x_1,\dots,x_n$, where arithmetic is done modulo two (i.e., over the field$\...

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Processors are clocked, so even if some instructions can clearly be done faster than others, they may well take the same number of cycles. You'll probably find that the circuitry required to transport data between registers and execution units is significantly more complicated than the adders. Note that the simple MOV (register to register) instruction ...

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Addition is important enough to not have it wait for a carry bit to ripple through a 64-bit accumulator: the term for that is a carry-lookahead adder and they are basically part of 8-bit CPUs (and their ALUs) and upwards. Indeed, modern processors tend to need not much more execution time for a full multiplication either: carry-lookahead is actually a ...

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Logic circuits are common in complexity theory, where they go by the name circuits. There is a big difference between circuits and models of computation such as the Turing machine: each circuit can only handle inputs of fixed size. In order to fix this, under the circuit computation model, for every input length $n$ there is a circuit $C_n$, and together ...

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Arithmetic circuits compute a polynomial in their input. An arithmetic circuit over some field $\mathbb{F}$ with $n$ variables and total degree $d$ can compute functions $f:\mathbb{F}^n\rightarrow\mathbb{F}$ of the form: $$f(x_1,...,x_n)=\sum\limits_{i_1+...+i_n\le d}\alpha _{i_1,...,i_n}\cdot x_1^{i_1}x_2^{i_2}...x_n^{i_n}$$ where $\alpha _{i_1,...,i_n}\... 10 I think you'd be hard pressed to find a processor that had addition taking more cycles than a bitwise operation. Partly because most processors must carry out at least one addition per instruction cycle simply to increment the program counter. Mere bitwise operations aren't all that useful. (Instruction cycle, not clock cycle - e.g. the 6502 takes a minimum ... 10 There are only so many circuits using at most$m$gates, say$f(m)$. If all Boolean functions on$n$inputs could be computed using at most$m$gates, then$f(m) \geq 2^{2^n}$, since there are$2^{2^n}$Boolean functions on$n$inputs. Hence if$f(m) < 2^{2^n}$then there must be a function on$n$inputs which cannot be computed using at most$m$gates. ... 9 As Pål GD mentions in his comment, the proof is actually very simple: there are$2^{2^n}$functions, but only$C_S = S^{O(S)}$circuits of size at most$S \geq n$. The exact constant in the exponent depends on the exact definition of a circuit. Getting the best exponent requires some rather intricate arguments, together with the assumption$S = \omega(n)$. ... 9 At the gate level, you are correct that it takes more work to do addition, and thus takes longer. However, that cost is sufficiently trivial that doesn't matter. Modern processors are clocked. You cannot do instructions at anything except multiples of this clock rate. If the clock rates were pushed higher, to maximize the speed of the bitwise operations, ... 8 Take a language$L$which is not in$\mathsf{E} = \bigcup_{c=1}^\infty \mathsf{TIME}(2^{cn})$. Now consider the language$L' = \{1^m : m \in L\}$. Then$L'$is clearly in$\mathsf{P/poly}$, but it's not in$\mathsf{P}$: if it were decidable in time$O(m^k)$, then we could decide$L$in time$O((2^n)^k)$, and so$L$would be in$\mathsf{E}$. Our decision ... 8 No, a lower bound means that somebody has proved that anything smaller than 53 is impossible. That doesn't mean that a 53-gate network is known or even necessarily possible; just that there cannot be a smaller one than that. 8 Modern processors are clocked: Every operation takes some integral number of clock cycles. The designers of the processor determine the length of a clock cycle. There are two considerations there: One, the speed of the hardware, for example measured as the delay of a single NAND-gate. This depends on the technology used, and on tradeoffs like speed vs. power ... 7 This has been proved by Muller as early as 1956. Here is the construction. Let$k$be a parameter. We first compute all possible functions on the first$k$inputs in size$O(2^{2^k})$(see below). We then construct a decision tree for the other$n-k$variables, connecting it to the correct function on the remaining variables. This takes$O(2^{n-k})$(see ... 7 For a univariate polynomial$p(x)$, yes, it's that easy. For a multivariate polynomial$p(x_1,x_2,\dots,x_k)$, no, no such algorithm works. In particular, when you write "a polynomial of degree$d$has at most$d$roots", that is true for univariate polynomials$p(x)$, but it is not true in general for multivariate polynomials. Ricky Demer gives a simple ... 7 Any Boolean function can be written as a DNF. Each clause in the DNF specifies one truth assignment for which the function holds. For example, the DNF form of XOR is$(x \land \lnot y) \lor (\lnot x \land y)$. The main observation is that if the function is monotone, you can remove all the negated literals (why?). Once you do that, you get a formula for the ... 7 An AC0 many-one reduction is a many-one reduction that can be implemented by an AC0 circuit. It's just like a polynomial-time many-one reduction, except that instead of requiring that the mapping takes polynomial time, we require that the mapping is in AC0. David Richerby further explains: "AC0 is a very low-complexity class so it can be used, for example, ... 6$\mathsf{P/Poly} = \bigcup\limits_{k\in\mathbb{N}}\mathsf{SIZE}(n^k)$. We don't know if every language in$\Sigma_2$has a polynomial size circuit, but we do know that we cannot have polynomial circuits of bounded degree,i.e.$\mathsf{SIZE}(n^k)$for some$k\in \mathbb{N}$, for all languages in$\Sigma_2$(Kannan's theorem). 6 Suppose you have vectors$u$and$v$. Imagine a table$M$of the products of each of their entries.$$M = |u\rangle\langle v| = \begin{bmatrix} u_0 v_0 & u_1 v_0 & u_2 v_0 & \dots & u_{n-1} v_0 \\ u_0 v_1 & u_1 v_1 & u_2 v_1 & \dots & u_{n-1} v_1 \\ u_0 v_2 & u_1 v_2 & u_2 v_2 & \dots & u_{n-1} v_2 \\ \vdots &... 6 The lower bound for an problem states that "no algorithm can do better than this". In your case, it means that no sorting network for 16 inputs can have fewer than 53 gates. Sometimes there can be confusion between the reader and writer regarding whether a lower bound is tight or not. A tight lower bound states, "no algorithm can do better than this, and ... 6 Let me correct a few things that were not mentioned that explicitely in your existing answers: I know that bitwise operations are so fast on modern processors, because they can operate on 32 or 64 bits on parallel, This is true. Labeling a CPU as "XX" bit usually (not always) means that most of its common structures (register widths, addressable RAM etc.... 6 The problem is PP-hard. This means that unless the polynomial hierarchy collapses to NP, then deciding whether a circuit is boring is not in NP (and consequently is not NP-complete). The collapse follows from the fact that PP is closed under complement, so$\mathsf{PP=NP}$implies$\mathsf{NP=coNP}$. We now show that deciding whether or not a circuit is ... 5 Eventually I ended up solving this for$O(n)$gates. I wrote up a trilogy of blog posts on it. Constructing Large Controlled Nots (classically, with an ancilla) Constructing Large Increments (classically, with an ancilla) Using Quantum Gates instead of Ancilla Bits Of course it would suck if you found this twenty years from now and my website was long gone,... 5 The proof that$\mathsf{NL} \subseteq \mathsf{AC}^1$is constructive, giving an$\mathsf{AC}^1$circuit for directed reachability. Since directed reachability is$\mathsf{NL}$-complete and 2SAT is in$\mathsf{NL}$, there is an$\mathsf{AC}^0$reduction from 2SAT to directed reachability. Combining the$\mathsf{AC}^1$circuit for directed reachability with ... 5 Straight-line programs and arithmetic circuits are two equivalent ways of describing the same computational model. A straight-line program typically has the following instructions: Reading the input:$t_i \gets x_j$. Initialization by constants:$t_i \gets r$for all$r$in the ambient field. Addition, subtraction, multiplication, division:$t_t \gets t_j \...

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In circuit complexity, a monotone operation is a function $f$ which is also monotone: if $x \leq y$ then $f(x) \leq f(y)$, where $x \leq y$ is a shorthand for $x_i \leq y_i$ for all $i$. There are many ways to define modulo $N$, but most of them are probably either uninteresting or not monotone. For example, consider the function which is true if the input ...

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