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I think the prime reason why register machines are better at performance because registers are within the CPU chip itself, however stack is generally the part of main memory, accessing register is on average 3-5 clock cycles, level 1 cache requires nearly 10-20 cycles on average, and depending on the design it could have level 2 shared cache which takes ...


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I haven't edited my question, but in case others are here: this thesis addresses the question I was intending (https://core.ac.uk/download/pdf/52104064.pdf), finding e.g. 1189 average transitions required for a certain architecture for a 16-bit by 16-bit multiply that's completely random bits. \


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The Rule 110 cellular automaton is apparently Turing-complete. If you're not counting the cost of memory, I imagine a circuit that applies the Rule 110 evolution rules could be implemented with very few switches. See also https://softwareengineering.stackexchange.com/q/230538/34181.


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