# Tag Info

## New answers tagged computer-architecture

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For example consider same cache line in processor P1 is in OWNED state & processor P2 is in SHARED state. What happens when there is a write request to P2? Owned means that the P1 has written to the cache line and it is dirty but not written back to memory. P1 will answer any requests for the current value instead of main memory answering them until ...

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a) if during left shift the output signal immediately followed the input, output changes were no longer synchronous. (And the circuit would just act as a "buffer".) b) when you shift it left, all you're really doing is sending the data input straight to the output no: it shifts the FFlops' data right to left, capturing Input data in the rightmost one (the ...

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(For a) & b), my take is $2^{16}$ of whatever are addressable units - the bus size not being an indication (see e.g. Intel 8086↔8088). It does not read 16 address lines/signals, nor does it mention address multiplexing. Implementations not supplying a signal for every architectural address bit are somewhat common: physical address space may be smaller (...

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There are two possibilities: No operation is allowed to take longer than one clock cycle. If the designers of the CPU can't fit an operation into one clock cycle, then either the clock cycle must be made longer, or that operation must be split into two, or they designers work extra hard to make that operation faster. That's the more common way to do this. ...

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for part c I think the answer could be the use of an expansion bus

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It's simple - 32 bit word size, or 32 bit architecture, mean exactly what the person using the expression means. No more, no less. You can't draw any conclusions from it. For example, there's an Intel 32 bit architecture that can address 64 GB of physical RAM, and no Intel 64 bit architecture that can address anything near 2^64 bytes of physical or virtual ...

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In traditional horizontal microcode, a micro-operation is the most basic operation achievable by a processor; a micro-instruction is a set of micro-operations which are executable simultaneously; control words are the bit patterns used to encode the micro-instructions. Micro-operation is also used in current pipelined processors where an instruction is ...

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Ignore recursion for the moment, and pretend that a recursive call is just like any other call. Then the solution is easy: all local variables are spilled to the stack across calls, including the recursive call. So yes, if there is deep recursion going on, most of the local variables will reside on the stack most of the time. Every platform (operating ...

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The minimum that you need is zero registers. And there have been actual computers with zero registers. The most popular Pascal compiler (UCSD-Pascal) generated "p-code" which used zero registers; it was usually interpreted, but there was actually a hardware implementation.

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You need to make your question a bit more precise. First, regarding your request to avoid "unlimited" registers -- I assume you mean registers that can hold an arbitrary value (e.g., any natural number). If you a-priori bound your registers, then the possible states your machine can be in is finite. That is, you have a deterministic finite automaton (or ...

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The accepted answer clear most of the doubt, and here I wanna make a note here (for comp org student). We consider the addresses are not byte addressable (as mentioned in the question, they are word addresses). The equation (with +2 offset) mentioned in the textbook should not be used directly in this question. remind that offset does not need to be matched ...

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In theory, the opcode is held in the instruction register (IR) until the instruction is complete. There is a cycle counter that is re-initialised each time a new instruction is started. The IR controls what happens at each cycle. For example, with a 0-operand instruction, the program counter is not incremented until the end of the instruction. With a 2-...

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A competing architecture needs to tick these boxes reasonably well: Doing stuff we want Nobody will use it unless nearly all features available in popular high-level languages are supported reasonably efficiently. You can check out this paper with a provocative title: The von Neumann Architecture Is Due for Retirement. It outlines a lot of the challenges ...

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Normally the opcode encoding is designed to make it easy to tell. The details of exactly how that works will depend on the particular architecture. For instance, in your example, the first 4 bits might be enough to determine which category the instruction is in. This decoding is performed by the instruction decoder. As Ran G. explains, usually, either ...

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$\pi$ does show up in the fast Fourier transform, which is a central algorithm in many areas of computer science.

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One assumption that is often used by researchers in the wireless sensor networks community is to model the region of coverage of a transmitter node as a circle (of unit radius, say) centered at that node. The graph representing such a network is called a unit disk graph because the vertices of the graph correspond to certain locations in the plane, and two ...

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The $\pi$ constant is not used in theoretical computer science due to some intrinsic value or utility of the constant itself. However, it is (obviously) used in the simulations of physical systems or mathematical equations in which it appears. Precisely for this reason, one of the efforts that computer scientist and mathematicians have made in this regard ...

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A "register file" is an aggregation of registers. That is, it is one component that holds several different registers. How many read/write ports? Well, this depends. It can be 1 and 1, or more, according to the specific system. If you are the engineer, you can design a register file with as many read and write ports as you desire. The maximal number would ...

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um I'm not sure if it is what you are looking for or not. I assume by memory model you mean the part in which we place input and do some calculation (like paper which we write something to remember and calculate). The memory model depends on the definition of the model itself. In CS we have different kinds of computing model with different power. One of the ...

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