Questions tagged [operating-systems]

Questions about the principles of software that interfaces between hardware and applications.

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Resolving windows 7 resume [on hold]

I have a windows 7 desktop. Today when I tried to start it. A black screen appeared. With option 1) continue with resume data 2)delete restoration data and proceed to system boot menu But the ...
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How are hardware interrupts handled?

I have read that a hardware interrupt is handled asynchronously by the CPU, which means that the interrupt signal may arrive at any point of time with respect to the CPU clock cycle. Now, this means ...
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Software management of TLB misses?

I'm reading an OS textbook and it was talking about TLB misses being handled by software. I'm very new to all this by the way. So there's a context switch to some kernel procedure. But surely in this ...
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What is a batch based interface?

I came across this description of Batch Interface: "commands and directives are used to manage those commands that are entered into files and those files get executed. " I would really appreciate if ...
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What is a 'dynamic entity' in computer science?

I am doing some reading into computer science and how the computing system works in order to be ready for my 1st year at university doing a Computer Science degree. I came across a term within the ...
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How many segments a process can have in operating system employing Segmentation for memory management

Some facts about "Segmented Paging" 1) Each process has one segment table. 2) There is one-page table per segment. Fact about "Paged segmentation" 3) Contains page table of segment table. Now ...
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Can many threads run in a parallel in many-to-one model?

The book I am reading suggests that in a many-to-one multi-threading model, the threads are unable to run in parallel in a multi-core system. I am thinking this is not the case because if we have many-...
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Calculation of speed up of a program executed in multi-threaded system

Speed up of execution of a program is to be calculated within a multi-threading rather than a single thread system. The program's 30% instruction can be executed serially & rest can be executed ...
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38 views

How are logical addresses of instruction operands mapped to physical addresses?

Is address translation for all operands in single instruction done only once and then are all operands fetched continuously? For example, consider any dummy instruction ...
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Which page replacement algorithm causes thrashing

This is rather simple conceptual question. I can guess the answer, but no text explicitly discuss thrashing in the context of different page replacement algorithm. So I want to take your confirmation ...
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What are necessity and sufficiency?

I was reading deadlock topic from Operating Systems book by Stallings. It states four pre requisites for deadlock: Mutual exclusion No preemption Hold and wait Circular wait It then have following ...
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How can I solve this deadlock related problem mathematically?

I came across following problem: A system has n resources R0,…,Rn-1,and k processes P0,….Pk-1.The implementation of the resource request logic of each process Pi is as follows: ...
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Comparing wait-signal alternatives for synchronizing two piece of programs

I came across following problem: A certain computation generates two arrays a and b such that ...
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Designing solution to critical section problem with two semaphores vs single semaphore

I came across following problem: Let two processes P1 and P2 are there: ...
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Does this state certify to be called as a deadlock?

I came across following problem: Barrier is a synchronization construct where a set of processes synchronizes globally i.e., each process in the set arrives at the barrier and waits for all others ...
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Why is 2^32 in a 32-bit system = 4GiB and not 4Gib?

I was watching this video 32-Bit vs 64-Bit - The Advantage and at 1:19 (timestamp) the narrator mentioned the 4GB memory allocation for the 32-bit system. I later found out it should've been 4GiB but ...
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Why we need size of the page table should be some fraction of virtual address space

The Page Table should have all virtual page number which are in its logical address space, Why it's the case? Is it because we want to access Page Table entry fast just like an array where key is ...
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Why does paging not have external fragmentation?

I have read that paging does not suffer from external fragmentation as the frames and the pages are all of the equal sizes, but when we store a last level page table in a frame at that time it may not ...
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81 views

How does dynamic memory-allocation exactly work?

I have wondered about ordinary code. Assume we are running this code on any modern System like Unix/Linux/Mac/Windows. This code is C, but it should work with every language which is close to the ...
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Why in the Map Reduce Implementation, why not stream the records to the reducer (via TCP) as they are being produced by the mappers?

In the Map-Reduce implementation, the reducers start when all mappers finish their jobs. Why don't we stream the records from mappers to reducers while they are being processed instead? I think there ...
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How to calculate average waiting time for round robin cpu scheduling?

I have tried to calculate average waiting time for the below details there are two answers I'm getting using two methods I'm not understanding which one is correct? The time quantum is 2 This is the ...
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Any good source explaining multiprocessor synchronization techniques and their implementation

I need to study how synchronization is done in a multiprocessor operating system, but I am unable to find a good source. I have read about it in the book "Modern Operating System" by Tanenbaum, but I ...
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Inputting values to register files

I'm trying to understand how to register files. The question below is from past exam paper: The following diagram shows the register-file from a simple 8-bit machine I don't fully get register ...
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What architectural features will allow this microprocessor to access a separate “I/O space”?

I'm studying for my final and don't understand this question. Here is the full question (from Stallings 8th edition): Consider a hypothetical microprocessor generating a 16-bit address (e.g., ...
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How exactly does a CPU do process scheduling?

I know in theory how various scheduling algorithms work, such as round robin, where each process is given small time slices to run a few instructions, before the operating system passes execution onto ...
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How can an unstable kernel write a memory dump?

I always wondered how a kernel that became unstable, e.g. due to a BSOD or a kernel panic, is able to do specific tasks. For example, if a Windows driver corrupts the stack of the kernel. It leads to ...
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Why do OS and DBMS have their own synchronisation mechanisms, when OS can alone do it and it sits at the bottom of DB?

I know that synchronization is important in the OS, but why do we need a separate topic synchronization and concurrency in the DBMS? The OS concentrates on program synchronization while the DBMS ...
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Single processor system supporting two running processes, A and B, with the following sequential execution patterns [closed]

Can anyone please help me with the following question? Consider a single processor system supporting two running processes, A and B, with the following sequential execution patterns: A: [CPU 8 ms; ...
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Understanding Bounded Waiting

I am trying to understand bounded waiting and i have a question. The definition is as follows: Bounded waiting - There exists a bound, or limit, on the number of times that other processes are ...
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what is the difference between Operating system and Window Systems?

Quoting from Tannenbaum_Operating_Systems_Design : On top of the operating system is the rest of the system software. Here we find the command interpreter (shell), window systems, compilers, ...
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How does operating system display decimal numbers which are stored as binary? [duplicate]

What kind of magic happen with bytes in memory?
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How the operating system allocated to dual-channels memory?

I learned that the boot loader transmit the operating system from Hard Disk to Main Memory during the booting process. I wonder, today's computers are equipped with multiple slice of memory of dual-...
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268 views

LRU vs FIFO page replacement

I am wondering if there is an instance where FIFO results in less page faults than LRU. For example: 2,6,5,7... In this string, if I have to complete it by ...
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Addresses with no memory allocated

I've read that a program can crash if it tries to access addresses with no memory allocated. But, how is it possible that an address has no memory allocated? When does it happen?
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Difference between present - absent bit and valid - invalid bit in a page table?

while reading I found this: Present/Absent bit – Present or absent bit says whether a particular page you are looking for is present or absent. In case if it is not present, that is called Page ...
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Appreciation of the 5 state process model

I'm starting out in an Operating Systems module. I have a few understanding questions to think about, which will not be gone through in class. A process state model is an abstraction (or model) which ...
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Memory Mapping Segment

I read that "Memory Mapping Segment"/"memory mapped file" is a segment of the virtual memory of a process, where a file or file-like Ressource is loaded into. It is for high performance file I/O. I ...
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Two Process Solution for Critical Section Problem- Algorithm 1

I have started learning Critical Section Problem and its various solutions. To explain my question, let me first give a brief background of it. The general structure for a two Process Solution for ...
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address spaces of changing processes

I read that the mapping for user-space processes is changed after each process switch. By mapping I mean the translation from virtual addresses to "real" memory address. I thought that processes are ...
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What does it mean " The outer level page table need not be page aligned?

The question is in context to multilevel page table. I was trying to solve numerical on multi-level paging and noticed that page size might not be same at all levels. I came across the point "Outer ...
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Difference between Response time, Execution time, and CPU time

I studied Computer Architecture from David A. Patterson and have came across the idea of Response time. Response time also called Execution time. The total time required for the computer to ...
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multithreading - duration of jobs

" How long will it take for 2 jobs to complete if they're running in parallel, knowing that both have a total of 20 minutes of CPU usage time and 50% IO" I calculated the CPU usage: ...
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Calculate for each block, the number of bytes that can be assigned to data and to pointers to other blocks

In trying to solve the following problem: You are presented with the first 15 blocks of a secondary storage device (disk) which has a total of 30000 KB available. The linked allocation method is ...
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30 views

Threads and Operating System

In a computer, the processor executes different threads and changes between them, the operating system is a program at the end that it´s being executed by the processor, there exists the posibility ...
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If the string of N requests is repeated many times, which of the following is/are true?

If the string of N requests is repeated many times, which of the following is/are true? I. The fewest page faults occur when M ≥ N. II. LRU (least-recently-used) and FIFO (first-in-first-out) will ...
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Round-Robin fashion exercise

In my Operating Systems class I have an exercise to sketch out how a round-robin algorithm would apply to a specific scenario, which is the following: Now the correction that I was provided with by ...
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Definition of multiprogramming [duplicate]

Which combination of the following features will suffice to characterize an OS as a multi-programmed OS? a. More than one program may be loaded into main memory at the same time for execution b. If ...
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interrupts in operating system

Normally user programs are prevented from handling I/O directly by I/O instructions in them. For CPUs having explicit I/O instructions, such I/O protection is ensured by having the I/O instruction ...
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ARM STM instruction: page fault problem with MMIO

The ARM STM instruction is described here in the ARM manual. This instruction writes all or a subset of registers at memory locations starting from a base memory ...