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AProgrammer
  • Member for 10 years, 3 months
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42 votes

Why is addition as fast as bit-wise operations in modern processors?

11 votes

Correct name for a recursive descent parser that uses loops to handle left recursion?

10 votes
Accepted

Why is using a lexer/parser on binary data so wrong?

9 votes
Accepted

Word- or byte-addressable? Correct terminology

8 votes
Accepted

Ternary processing instead of Binary

8 votes

Hash table collisions: why use a linked list if we can use a hash set?

7 votes
Accepted

Why not use Right Recursion to avoid Left Recursion?

7 votes

C++ Strings vs. Character Arrays

7 votes

why do CPU architectures use a flags register (advantages?)

6 votes

Where is the reorder buffer (ROB)?

5 votes
Accepted

From the LR(1) parsing table, can we deduce that it is also an LALR and SLR table?

5 votes

Is it better to store the magnitude of an arbitrary-precision number in BigEndian or LittleEndian order in an integer array?

5 votes

Are today's massive parallel processing units able to run cellular automata efficiently?

5 votes

What is the significance of reverse polish notation?

5 votes

Why floating point representation uses a sign bit instead of 2's complement to indicate negative numbers

5 votes
Accepted

What does it mean that HDLs "explicitly include the notion of time"?

4 votes

Should compilers automatically translate operations into shortcuts?

4 votes
Accepted

Can CPU's 'shortcut' adding 0, multiplying by 1, and multiplying by 0?

4 votes
Accepted

What all can be said when you say that the CPU is 32 bit?

4 votes

reduce reduce and shift reduce error in LALR grammar

4 votes
Accepted

How much bigger can an LR(1) automaton for a language be than the corresponding LR(0) automaton?

3 votes
Accepted

Item lookaheads versus dot lookaheads for $LR(k)$ with $k \gt 1$?

3 votes

Does having one large L1 cache instead of L1 and L2 cache makes computation faster?

3 votes

Confusion about data types, compilers, hardware data representation and static vs dynamic typing

3 votes

Is a 2 address machine more likely to follow a RISC or CISC design?

3 votes

CPU frequency per year

3 votes
Accepted

Detecting overflow in summation

3 votes

Is this language LL(1) parseable?

3 votes
Accepted

How does RAM is shared in multi core environment?

3 votes
Accepted

how os can calculate cpu cache size?