How does the program counter "know" when the fetch cycle is complete?

Question

So my understanding of updating the PC is as follows:

1. Put memory address indicated by PC into memory address register
2. Load the contents of the address pointed to by memory address register into memory data register
3. Place this instruction in the current instruction register.
4. Update PC
5. Decode instruction by passing it to the control unit and letting it handle it. Execute after that

That makes sense

What I don't get is, how does the PC know when the fetch phase is done? How does it know WHEN it needs to update?

Is there an update flag attached to the current instruction register? If there is, how does it work?

What mechanism tells the program counter when to update?

Answer 1

A very simple and straightforward mechanism is to have the PC update automatically in a combinatory fashion, as soon as the cycle of the instructrion start: we design the system to pass the content of the PC to the memory address register and simultaneously to an adder, the output of wich is forward in input to the PC register. When the next cycle start, the PC contains the right address. Obviusly this mechanism does not allow for more flexible operations on the instruction flow, like jumps or branches.

(In the image the PC is increased by 4 bytes, assuming 32 bit instructions)

It has to be noticed that this kind of setup could work for single-cycle style processor, but needs to be adjusted for multy-cycle designs, and obviously does not take into account many variables that require real CPUs to perform potentially much more articulated update logics.