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I am going over some practice questions for the Major field exam and it asks:

A processor with a word-addressable memory has a two-way set-associative cache. A cache line is one word, so a cache entry contains a set of two words. If there are M words of memory and C cache entries, how many words of memory map to the same cache entry?

I am not sure how to even approach this problem since I am not too familiar with computer organization. Any help would be appreciated. Thanks!

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    $\begingroup$ If you aren't familiar with cache organisation, then you should go over it once before attempting it. This is a fairly easy problem. This should cover most of what you need. $\endgroup$
    – Gokul
    Commented Dec 2, 2018 at 7:57

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The total cache size is C entries of two words each = 2C words.

The total memory is M words.

Assuming that the same number of words are mapped to each cache entry (and this is a very very safe assumption), there are M / (2C) words mapped to each entry.

There is another answer claiming this is the same question as in some test, with a different answer. Since the answer is wrong, I assume that the questions were not quite the same, but the link in that answer doesn't work.

PS. Words of memory mapped to each cache line is usually quite irrelevant. It's a measurement that changes if you double, quadruple or halve the memory size which is all irrelevant to the cache performance.

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Cache has C/2 fixed locations

which further implies, we have

M / (C/2) = 2M/C

words of memory which map to same location

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  • $\begingroup$ There are C cache entries of two words each, so 2C words of cache, not C/2. $\endgroup$
    – gnasher729
    Commented Jan 4, 2023 at 14:21
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The correct answer is M/C. This question is on the Computer science Major Field Assessment Test. https://www.ets.org/Media/Tests/MFT/pdf/mft_samp_questions_compsci.pdf

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