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what is the difference between memory access and data memory access?

for example, here are the examples of register transfer language instructions:

  • $R1 ←[18]$
  • $R2 ←[R1 +3]$
  • $R1 ← R1 +2$
  • $[8] ← R1$
From my understanding, memory access is where load/store occurs, like these instructions
  • $R1 ←[18]$
  • $R2 ←[R1 +3]$
  • $[8] ←R1$
  • But what about data memory access? what is it?

    thanks!

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    • $\begingroup$ What's the context in which you ran across those terms? What were you reading when you ran across them? Probably they are synonyms, in modern computers. $\endgroup$ – D.W. Feb 13 '16 at 0:22
    • $\begingroup$ @D.W. I am in the computer architecture class, and my professor was talking about the MIPS architecture . $\endgroup$ – David Feb 13 '16 at 0:25
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      $\begingroup$ I suspect memory accesses includes instruction memory access as well as data memory accesses. (On a TLB miss there will be additional memory accesses to fill the TLB. These are typically ignored to present a simpler model.) $\endgroup$ – Paul A. Clayton Feb 13 '16 at 12:50
    • $\begingroup$ @PaulA.Clayton, thank you, could you tell me what exactly is data memory access? what is its definition? $\endgroup$ – David Feb 13 '16 at 14:47
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    A memory access happens when the CPU loads bits from main memory or stores bits to main memory. The CPU will first check to see if it can load the bits from a cache, in which case it will skip the (slow) memory access entirely.

    One kind of memory access is a data memory address, when the CPU runs an instruction that explicitly loads or stores data from/to memory. In your examples, the arrows request data memory accesses (or cache accesses). "Data" is a very general term but here it means the bits that the program is operating on, as distinct from the bits that convey the program itself.

    Another kind of memory access is an instruction fetch, which happens when the program counter gets a new value as part of running the instructions in the program. It usually just steps forward but a branch instruction can jump to a new location. Either way, no memory access is needed when the instructions are already cached.

    In your example, the sequence of register/memory instructions have to load into the CPU before it can execute them. That requires instruction fetches.

    (A Harvard architecture CPU has one bus to/from data memory and a second bus to/from instruction memory, so it can fetch from both in parallel. In that case the distinction between an instruction fetch and a data fetch is starker.)

    The instructions themselves had to get into memory somehow. An interpreter or loader put them there, treating those instructions as data.

    The distinction is whether the data is loading by the explicit request of the program instructions vs. the implicit need to load instructions themselves. The former are easier to cost out. The latter costs depend on the size of the instruction caches, on interruptions taken that might spill this program's instructions from the cache, etc.

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